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https://github.com/c64scene-ar/llvm-6502.git
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9312313a56
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33741 91177308-0d34-0410-b5e6-96231b3b80d8
85 lines
2.7 KiB
C++
85 lines
2.7 KiB
C++
//===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the "Instituto Nokia de Tecnologia" and
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// is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "ARMTargetMachine.h"
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#include "ARMTargetAsmInfo.h"
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#include "ARMFrameInfo.h"
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#include "ARM.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Target/TargetMachineRegistry.h"
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#include "llvm/Target/TargetOptions.h"
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using namespace llvm;
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static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
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cl::desc("Disable load store optimization pass"));
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namespace {
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// Register the target.
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RegisterTarget<ARMTargetMachine> X("arm", " ARM");
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}
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/// TargetMachine ctor - Create an ILP32 architecture model
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///
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ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
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: Subtarget(M, FS),
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DataLayout(Subtarget.isTargetDarwin() ?
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(Subtarget.isThumb() ?
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std::string("e-p:32:32-d:32:32-l:32:32-s:16:32-b:8:32-B:8:32-A:32") :
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std::string("e-p:32:32-d:32:32-l:32:32")) :
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(Subtarget.isThumb() ?
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std::string("e-p:32:32-d:32:64-l:32:64-s:16:32-b:8:32-B:8:32-A:32") :
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std::string("e-p:32:32-d:32:64-l:32:64"))),
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InstrInfo(Subtarget),
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FrameInfo(Subtarget) {}
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unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
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std::string TT = M.getTargetTriple();
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if (TT.size() >= 4 && std::string(TT.begin(), TT.begin()+4) == "arm-")
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return 20;
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if (M.getPointerSize() == Module::Pointer32)
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return 1;
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else
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return 0;
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}
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const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
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return new ARMTargetAsmInfo(*this);
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}
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// Pass Pipeline Configuration
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bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
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PM.add(createARMISelDag(*this));
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return false;
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}
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bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
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// FIXME: temporarily disabling load / store optimization pass for Thumb mode.
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if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
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PM.add(createARMLoadStoreOptimizationPass());
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PM.add(createARMConstantIslandPass());
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return true;
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}
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bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
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std::ostream &Out) {
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// Output assembly language.
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PM.add(createARMCodePrinterPass(Out, *this));
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return false;
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}
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