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https://github.com/c64scene-ar/llvm-6502.git
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Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
160 lines
4.4 KiB
C++
160 lines
4.4 KiB
C++
//===-- X86AsmLexer.cpp - Tokenize X86 assembly to AsmTokens --------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/X86BaseInfo.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCParser/MCAsmLexer.h"
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#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
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#include "llvm/MC/MCTargetAsmLexer.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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namespace {
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class X86AsmLexer : public MCTargetAsmLexer {
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const MCAsmInfo &AsmInfo;
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bool tentativeIsValid;
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AsmToken tentativeToken;
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const AsmToken &lexTentative() {
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tentativeToken = getLexer()->Lex();
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tentativeIsValid = true;
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return tentativeToken;
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}
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const AsmToken &lexDefinite() {
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if (tentativeIsValid) {
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tentativeIsValid = false;
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return tentativeToken;
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}
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return getLexer()->Lex();
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}
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AsmToken LexTokenATT();
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AsmToken LexTokenIntel();
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protected:
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AsmToken LexToken() {
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if (!Lexer) {
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SetError(SMLoc(), "No MCAsmLexer installed");
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return AsmToken(AsmToken::Error, "", 0);
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}
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switch (AsmInfo.getAssemblerDialect()) {
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default:
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SetError(SMLoc(), "Unhandled dialect");
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return AsmToken(AsmToken::Error, "", 0);
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case 0:
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return LexTokenATT();
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case 1:
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return LexTokenIntel();
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}
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}
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public:
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X86AsmLexer(const Target &T, const MCRegisterInfo &MRI, const MCAsmInfo &MAI)
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: MCTargetAsmLexer(T), AsmInfo(MAI), tentativeIsValid(false) {
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}
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};
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} // end anonymous namespace
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#define GET_REGISTER_MATCHER
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#include "X86GenAsmMatcher.inc"
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AsmToken X86AsmLexer::LexTokenATT() {
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AsmToken lexedToken = lexDefinite();
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switch (lexedToken.getKind()) {
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default:
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return lexedToken;
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case AsmToken::Error:
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SetError(Lexer->getErrLoc(), Lexer->getErr());
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return lexedToken;
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case AsmToken::Percent: {
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const AsmToken &nextToken = lexTentative();
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if (nextToken.getKind() != AsmToken::Identifier)
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return lexedToken;
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if (unsigned regID = MatchRegisterName(nextToken.getString())) {
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lexDefinite();
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// FIXME: This is completely wrong when there is a space or other
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// punctuation between the % and the register name.
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StringRef regStr(lexedToken.getString().data(),
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lexedToken.getString().size() +
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nextToken.getString().size());
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return AsmToken(AsmToken::Register, regStr,
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static_cast<int64_t>(regID));
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}
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// Match register name failed. If this is "db[0-7]", match it as an alias
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// for dr[0-7].
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if (nextToken.getString().size() == 3 &&
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nextToken.getString().startswith("db")) {
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int RegNo = -1;
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switch (nextToken.getString()[2]) {
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case '0': RegNo = X86::DR0; break;
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case '1': RegNo = X86::DR1; break;
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case '2': RegNo = X86::DR2; break;
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case '3': RegNo = X86::DR3; break;
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case '4': RegNo = X86::DR4; break;
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case '5': RegNo = X86::DR5; break;
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case '6': RegNo = X86::DR6; break;
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case '7': RegNo = X86::DR7; break;
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}
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if (RegNo != -1) {
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lexDefinite();
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// FIXME: This is completely wrong when there is a space or other
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// punctuation between the % and the register name.
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StringRef regStr(lexedToken.getString().data(),
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lexedToken.getString().size() +
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nextToken.getString().size());
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return AsmToken(AsmToken::Register, regStr,
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static_cast<int64_t>(RegNo));
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}
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}
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return lexedToken;
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}
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}
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}
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AsmToken X86AsmLexer::LexTokenIntel() {
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const AsmToken &lexedToken = lexDefinite();
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switch(lexedToken.getKind()) {
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default:
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return lexedToken;
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case AsmToken::Error:
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SetError(Lexer->getErrLoc(), Lexer->getErr());
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return lexedToken;
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case AsmToken::Identifier: {
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unsigned regID = MatchRegisterName(lexedToken.getString().lower());
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if (regID)
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return AsmToken(AsmToken::Register,
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lexedToken.getString(),
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static_cast<int64_t>(regID));
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return lexedToken;
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}
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}
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}
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extern "C" void LLVMInitializeX86AsmLexer() {
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RegisterMCAsmLexer<X86AsmLexer> X(TheX86_32Target);
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RegisterMCAsmLexer<X86AsmLexer> Y(TheX86_64Target);
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}
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