llvm-6502/test/CodeGen
Tom Stellard 2a4d3e7e87 R600/SI: Add processor types for each SI variant
Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05 23:31:35 +00:00
..
AArch64
ARM Reverting 178851 as it broke buildbots 2013-04-05 16:39:53 +00:00
CPP
Generic
Hexagon Hexagon: Enable SupportDebugInfomation and DwarfInSection flags. 2013-03-28 19:34:49 +00:00
Inputs
MBlaze
Mips [mips] Small update to the implementation of eh.return for Mips. 2013-04-02 23:02:07 +00:00
MSP430
NVPTX [NVPTX] Remove support for SM < 2.0. This was never fully supported anyway. 2013-03-30 14:29:30 +00:00
PowerPC Enable early if conversion on PPC 2013-04-05 23:29:01 +00:00
R600 R600/SI: Add processor types for each SI variant 2013-04-05 23:31:35 +00:00
SI
SPARC Add SPARC v9 support for select on 64-bit compares. 2013-04-04 03:08:00 +00:00
Thumb
Thumb2
X86 Make the test/CodeGen/X86/win32_sret.ll reliable on any CPU by explicitly specifying the -mcpu 2013-04-05 17:05:56 +00:00
XCore