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				https://github.com/c64scene-ar/llvm-6502.git
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	This update was done with the following bash script:
  find test/CodeGen -name "*.ll" | \
  while read NAME; do
    echo "$NAME"
    if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
      TEMP=`mktemp -t temp`
      cp $NAME $TEMP
      sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
      while read FUNC; do
        sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
      done
      sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
      sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
      sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
      sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
      mv $TEMP $NAME
    fi
  done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
		
	
		
			
				
	
	
		
			60 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
			
		
		
	
	
			60 lines
		
	
	
		
			1.2 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
| ; RUN: llc < %s -march=xcore | FileCheck %s
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| define i64 @add64(i64 %a, i64 %b) {
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| 	%result = add i64 %a, %b
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| 	ret i64 %result
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| }
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| ; CHECK: add64
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| ; CHECK: ldc r11, 0
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| ; CHECK-NEXT: ladd r2, r0, r0, r2, r11
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| ; CHECK-NEXT: ladd r2, r1, r1, r3, r2
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| ; CHECK-NEXT: retsp 0
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| 
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| define i64 @sub64(i64 %a, i64 %b) {
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| 	%result = sub i64 %a, %b
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| 	ret i64 %result
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| }
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| ; CHECK: sub64
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| ; CHECK: ldc r11, 0
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| ; CHECK-NEXT: lsub r2, r0, r0, r2, r11
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| ; CHECK-NEXT: lsub r2, r1, r1, r3, r2
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| ; CHECK-NEXT: retsp 0
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| 
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| define i64 @maccu(i64 %a, i32 %b, i32 %c) {
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| entry:
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| 	%0 = zext i32 %b to i64
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| 	%1 = zext i32 %c to i64
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| 	%2 = mul i64 %1, %0
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| 	%3 = add i64 %2, %a
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| 	ret i64 %3
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| }
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| ; CHECK-LABEL: maccu:
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| ; CHECK: maccu r1, r0, r3, r2
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| ; CHECK-NEXT: retsp 0
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| 
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| define i64 @maccs(i64 %a, i32 %b, i32 %c) {
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| entry:
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| 	%0 = sext i32 %b to i64
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| 	%1 = sext i32 %c to i64
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| 	%2 = mul i64 %1, %0
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| 	%3 = add i64 %2, %a
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| 	ret i64 %3
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| }
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| ; CHECK-LABEL: maccs:
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| ; CHECK: maccs r1, r0, r3, r2
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| ; CHECK-NEXT: retsp 0
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| 
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| define i64 @lmul(i32 %a, i32 %b, i32 %c, i32 %d) {
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| entry:
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| 	%0 = zext i32 %a to i64
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| 	%1 = zext i32 %b to i64
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| 	%2 = zext i32 %c to i64
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| 	%3 = zext i32 %d to i64
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| 	%4 = mul i64 %1, %0
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| 	%5 = add i64 %4, %2
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| 	%6 = add i64 %5, %3
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| 	ret i64 %6
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| }
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| ; CHECK-LABEL: lmul:
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| ; CHECK: lmul r1, r0, r1, r0, r2, r3
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| ; CHECK-NEXT: retsp 0
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