llvm-6502/test/CodeGen
Benjamin Kramer bb41c75ab5 X86: Custom lower sext v16i8 to v16i16, and the corresponding truncate.
Also update the cost model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193270 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-23 21:06:07 +00:00
..
AArch64 [AArch64] Add the constraint to NEON scalar mla/mls instructions. 2013-10-21 20:11:47 +00:00
ARM 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets 2013-10-17 19:52:05 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips][msa] Added support for matching fexp2 from normal IR (i.e. not intrinsics) 2013-10-23 10:36:52 +00:00
MSP430
NVPTX
PowerPC Update PPC loop tests after SCEV non-unit-stride checkin r193015. 2013-10-19 00:14:04 +00:00
R600 R600/SI: fix MIMG writemask adjustement 2013-10-23 02:53:47 +00:00
SPARC
SystemZ Replace sra with srl if a single sign bit is required 2013-10-17 11:16:57 +00:00
Thumb 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets 2013-10-17 19:52:05 +00:00
Thumb2
X86 X86: Custom lower sext v16i8 to v16i16, and the corresponding truncate. 2013-10-23 21:06:07 +00:00
XCore