llvm-6502/test/CodeGen
Jim Grosbach f6713916fb ARM push of a single register encodes as pre-indexed STR.
Per the ARM ARM, a 'push' of a single register encodes as an STR,
not an STM.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 18:07:11 +00:00
..
Alpha
ARM ARM push of a single register encodes as pre-indexed STR. 2011-08-11 18:07:11 +00:00
Blackfin
CBackend Revert r137134. It breaks some code as Eli pointed out. 2011-08-09 18:56:35 +00:00
CellSPU
CPP
Generic
MBlaze
Mips
MSP430
PowerPC
PTX PTX: Add initial support for device function calls 2011-08-09 17:36:31 +00:00
SPARC
SystemZ
Thumb
Thumb2 Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611. 2011-08-08 19:49:37 +00:00
X86 [AVX] If the data which is going to be saved is already in two XMM registers 2011-08-11 16:41:21 +00:00
XCore