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llvm-6502/lib/Target/Hexagon
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Sirish Pande ab3a7fb244 Update load/store instruction patterns in Hexagon V4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156411 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-08 19:50:20 +00:00
..
InstPrinter
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
MCTargetDesc
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
TargetInfo
…
CMakeLists.txt
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
Hexagon.h
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
Hexagon.td
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonAsmPrinter.cpp
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
HexagonAsmPrinter.h
Hexagon: enable assembler output through the MC layer.
2012-04-12 17:55:53 +00:00
HexagonCallingConv.td
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonCallingConvLower.cpp
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
2012-03-17 18:46:09 +00:00
HexagonCallingConvLower.h
…
HexagonCFGOptimizer.cpp
…
HexagonExpandPredSpillCode.cpp
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
HexagonFrameLowering.cpp
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
2012-03-17 18:46:09 +00:00
HexagonFrameLowering.h
…
HexagonHardwareLoops.cpp
Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
2012-04-20 07:30:17 +00:00
HexagonImmediates.td
Hexagon: enable assembler output through the MC layer.
2012-04-12 17:55:53 +00:00
HexagonInstrFormats.td
Extensions of Hexagon V4 instructions.
2012-05-03 16:18:50 +00:00
HexagonInstrFormatsV4.td
Extensions of Hexagon V4 instructions.
2012-05-03 16:18:50 +00:00
HexagonInstrInfo.cpp
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
HexagonInstrInfo.h
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
HexagonInstrInfo.td
Extensions of Hexagon V4 instructions.
2012-05-03 16:18:50 +00:00
HexagonInstrInfoV3.td
Extensions of Hexagon V4 instructions.
2012-05-03 16:18:50 +00:00
HexagonInstrInfoV4.td
Update load/store instruction patterns in Hexagon V4.
2012-05-08 19:50:20 +00:00
HexagonIntrinsics.td
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonIntrinsicsDerived.td
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonIntrinsicsV3.td
…
HexagonIntrinsicsV4.td
…
HexagonISelDAGToDAG.cpp
Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().
2012-05-07 22:10:26 +00:00
HexagonISelLowering.cpp
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonISelLowering.h
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonMachineFunctionInfo.h
…
HexagonMCInst.h
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
HexagonMCInstLower.cpp
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
HexagonPeephole.cpp
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
2012-03-17 18:46:09 +00:00
HexagonRegisterInfo.cpp
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonRegisterInfo.h
This patch fixes a problem which arose when using the Post-RA scheduler
2012-04-23 21:39:35 +00:00
HexagonRegisterInfo.td
Remove the SubRegClasses field from RegisterClass descriptions.
2012-05-04 03:30:34 +00:00
HexagonRemoveSZExtArgs.cpp
…
HexagonSchedule.td
Extensions of Hexagon V4 instructions.
2012-05-03 16:18:50 +00:00
HexagonScheduleV4.td
Extensions of Hexagon V4 instructions.
2012-05-03 16:18:50 +00:00
HexagonSelectCCInfo.td
…
HexagonSelectionDAGInfo.cpp
…
HexagonSelectionDAGInfo.h
…
HexagonSplitTFRCondSets.cpp
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonSubtarget.cpp
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonSubtarget.h
Revert r155365, r155366, and r155367. All three of these have regression
2012-04-23 18:25:57 +00:00
HexagonTargetMachine.cpp
Support for target dependent Hexagon VLIW packetizer.
2012-05-03 21:52:53 +00:00
HexagonTargetMachine.h
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
2012-03-17 18:46:09 +00:00
HexagonTargetObjectFile.cpp
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
2012-03-17 18:46:09 +00:00
HexagonTargetObjectFile.h
…
HexagonVarargsCallingConvention.h
…
HexagonVLIWPacketizer.cpp
Add an MF argument to TRI::getPointerRegClass() and TII::getRegClass().
2012-05-07 22:10:26 +00:00
LLVMBuild.txt
Hexagon: enable assembler output through the MC layer.
2012-04-12 17:55:53 +00:00
Makefile
Hexagon: enable assembler output through the MC layer.
2012-04-12 17:55:53 +00:00