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https://github.com/c64scene-ar/llvm-6502.git
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edf128a7fa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21420 91177308-0d34-0410-b5e6-96231b3b80d8
585 lines
24 KiB
C++
585 lines
24 KiB
C++
//===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the VirtRegMap class.
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//
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// It also contains implementations of the the Spiller interface, which, given a
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// virtual register map and a machine function, eliminates all virtual
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// references by replacing them with physical register references - adding spill
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// code as necessary.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "spiller"
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#include "VirtRegMap.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/STLExtras.h"
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#include <algorithm>
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using namespace llvm;
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namespace {
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Statistic<> NumSpills("spiller", "Number of register spills");
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Statistic<> NumStores("spiller", "Number of stores added");
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Statistic<> NumLoads ("spiller", "Number of loads added");
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Statistic<> NumReused("spiller", "Number of values reused");
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Statistic<> NumDSE ("spiller", "Number of dead stores elided");
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enum SpillerName { simple, local };
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cl::opt<SpillerName>
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SpillerOpt("spiller",
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cl::desc("Spiller to use: (default: local)"),
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cl::Prefix,
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cl::values(clEnumVal(simple, " simple spiller"),
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clEnumVal(local, " local spiller"),
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clEnumValEnd),
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cl::init(local));
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}
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//===----------------------------------------------------------------------===//
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// VirtRegMap implementation
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//===----------------------------------------------------------------------===//
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void VirtRegMap::grow() {
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Virt2PhysMap.grow(MF.getSSARegMap()->getLastVirtReg());
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Virt2StackSlotMap.grow(MF.getSSARegMap()->getLastVirtReg());
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}
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int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
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assert(MRegisterInfo::isVirtualRegister(virtReg));
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assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
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"attempt to assign stack slot to already spilled register");
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const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(virtReg);
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int frameIndex = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
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RC->getAlignment());
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Virt2StackSlotMap[virtReg] = frameIndex;
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++NumSpills;
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return frameIndex;
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}
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void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int frameIndex) {
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assert(MRegisterInfo::isVirtualRegister(virtReg));
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assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
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"attempt to assign stack slot to already spilled register");
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Virt2StackSlotMap[virtReg] = frameIndex;
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}
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void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI,
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unsigned OpNo, MachineInstr *NewMI) {
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// Move previous memory references folded to new instruction.
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MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI);
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for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI),
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E = MI2VirtMap.end(); I != E && I->first == OldMI; ) {
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MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second));
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MI2VirtMap.erase(I++);
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}
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ModRef MRInfo;
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if (!OldMI->getOperand(OpNo).isDef()) {
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assert(OldMI->getOperand(OpNo).isUse() && "Operand is not use or def?");
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MRInfo = isRef;
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} else {
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MRInfo = OldMI->getOperand(OpNo).isUse() ? isModRef : isMod;
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}
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// add new memory reference
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MI2VirtMap.insert(IP, std::make_pair(NewMI, std::make_pair(VirtReg, MRInfo)));
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}
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void VirtRegMap::print(std::ostream &OS) const {
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const MRegisterInfo* MRI = MF.getTarget().getRegisterInfo();
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OS << "********** REGISTER MAP **********\n";
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for (unsigned i = MRegisterInfo::FirstVirtualRegister,
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e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) {
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if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG)
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OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n";
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}
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for (unsigned i = MRegisterInfo::FirstVirtualRegister,
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e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i)
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if (Virt2StackSlotMap[i] != VirtRegMap::NO_STACK_SLOT)
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OS << "[reg" << i << " -> fi#" << Virt2StackSlotMap[i] << "]\n";
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OS << '\n';
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}
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void VirtRegMap::dump() const { print(std::cerr); }
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//===----------------------------------------------------------------------===//
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// Simple Spiller Implementation
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//===----------------------------------------------------------------------===//
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Spiller::~Spiller() {}
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namespace {
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struct SimpleSpiller : public Spiller {
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bool runOnMachineFunction(MachineFunction& mf, const VirtRegMap &VRM);
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};
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}
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bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF,
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const VirtRegMap &VRM) {
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DEBUG(std::cerr << "********** REWRITE MACHINE CODE **********\n");
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DEBUG(std::cerr << "********** Function: "
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<< MF.getFunction()->getName() << '\n');
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const TargetMachine &TM = MF.getTarget();
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const MRegisterInfo &MRI = *TM.getRegisterInfo();
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bool *PhysRegsUsed = MF.getUsedPhysregs();
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// LoadedRegs - Keep track of which vregs are loaded, so that we only load
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// each vreg once (in the case where a spilled vreg is used by multiple
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// operands). This is always smaller than the number of operands to the
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// current machine instr, so it should be small.
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std::vector<unsigned> LoadedRegs;
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for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
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MBBI != E; ++MBBI) {
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DEBUG(std::cerr << MBBI->getBasicBlock()->getName() << ":\n");
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MachineBasicBlock &MBB = *MBBI;
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for (MachineBasicBlock::iterator MII = MBB.begin(),
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E = MBB.end(); MII != E; ++MII) {
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MachineInstr &MI = *MII;
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for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI.getOperand(i);
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if (MO.isRegister() && MO.getReg())
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if (MRegisterInfo::isVirtualRegister(MO.getReg())) {
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unsigned VirtReg = MO.getReg();
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unsigned PhysReg = VRM.getPhys(VirtReg);
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if (VRM.hasStackSlot(VirtReg)) {
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int StackSlot = VRM.getStackSlot(VirtReg);
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if (MO.isUse() &&
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std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
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== LoadedRegs.end()) {
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MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot);
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LoadedRegs.push_back(VirtReg);
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++NumLoads;
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DEBUG(std::cerr << '\t' << *prior(MII));
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}
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if (MO.isDef()) {
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MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot);
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++NumStores;
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}
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}
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PhysRegsUsed[PhysReg] = true;
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MI.SetMachineOperandReg(i, PhysReg);
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} else {
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PhysRegsUsed[MO.getReg()] = true;
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}
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}
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DEBUG(std::cerr << '\t' << MI);
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LoadedRegs.clear();
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}
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}
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return true;
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}
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//===----------------------------------------------------------------------===//
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// Local Spiller Implementation
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//===----------------------------------------------------------------------===//
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namespace {
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/// LocalSpiller - This spiller does a simple pass over the machine basic
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/// block to attempt to keep spills in registers as much as possible for
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/// blocks that have low register pressure (the vreg may be spilled due to
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/// register pressure in other blocks).
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class LocalSpiller : public Spiller {
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const MRegisterInfo *MRI;
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const TargetInstrInfo *TII;
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public:
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bool runOnMachineFunction(MachineFunction &MF, const VirtRegMap &VRM) {
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MRI = MF.getTarget().getRegisterInfo();
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TII = MF.getTarget().getInstrInfo();
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DEBUG(std::cerr << "\n**** Local spiller rewriting function '"
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<< MF.getFunction()->getName() << "':\n");
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for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
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MBB != E; ++MBB)
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RewriteMBB(*MBB, VRM);
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return true;
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}
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private:
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void RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM);
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void ClobberPhysReg(unsigned PR, std::map<int, unsigned> &SpillSlots,
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std::map<unsigned, int> &PhysRegs);
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void ClobberPhysRegOnly(unsigned PR, std::map<int, unsigned> &SpillSlots,
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std::map<unsigned, int> &PhysRegs);
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};
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}
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void LocalSpiller::ClobberPhysRegOnly(unsigned PhysReg,
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std::map<int, unsigned> &SpillSlots,
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std::map<unsigned, int> &PhysRegs) {
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std::map<unsigned, int>::iterator I = PhysRegs.find(PhysReg);
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if (I != PhysRegs.end()) {
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int Slot = I->second;
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PhysRegs.erase(I);
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assert(SpillSlots[Slot] == PhysReg && "Bidirectional map mismatch!");
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SpillSlots.erase(Slot);
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DEBUG(std::cerr << "PhysReg " << MRI->getName(PhysReg)
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<< " clobbered, invalidating SS#" << Slot << "\n");
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}
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}
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void LocalSpiller::ClobberPhysReg(unsigned PhysReg,
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std::map<int, unsigned> &SpillSlots,
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std::map<unsigned, int> &PhysRegs) {
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for (const unsigned *AS = MRI->getAliasSet(PhysReg); *AS; ++AS)
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ClobberPhysRegOnly(*AS, SpillSlots, PhysRegs);
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ClobberPhysRegOnly(PhysReg, SpillSlots, PhysRegs);
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}
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// ReusedOp - For each reused operand, we keep track of a bit of information, in
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// case we need to rollback upon processing a new operand. See comments below.
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namespace {
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struct ReusedOp {
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// The MachineInstr operand that reused an available value.
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unsigned Operand;
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// StackSlot - The spill slot of the value being reused.
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unsigned StackSlot;
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// PhysRegReused - The physical register the value was available in.
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unsigned PhysRegReused;
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// AssignedPhysReg - The physreg that was assigned for use by the reload.
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unsigned AssignedPhysReg;
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ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr)
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: Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr) {}
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};
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}
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/// rewriteMBB - Keep track of which spills are available even after the
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/// register allocator is done with them. If possible, avoid reloading vregs.
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void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) {
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// SpillSlotsAvailable - This map keeps track of all of the spilled virtual
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// register values that are still available, due to being loaded to stored to,
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// but not invalidated yet.
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std::map<int, unsigned> SpillSlotsAvailable;
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// PhysRegsAvailable - This is the inverse of SpillSlotsAvailable, indicating
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// which physregs are in use holding a stack slot value.
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std::map<unsigned, int> PhysRegsAvailable;
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DEBUG(std::cerr << MBB.getBasicBlock()->getName() << ":\n");
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std::vector<ReusedOp> ReusedOperands;
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// DefAndUseVReg - When we see a def&use operand that is spilled, keep track
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// of it. ".first" is the machine operand index (should always be 0 for now),
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// and ".second" is the virtual register that is spilled.
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std::vector<std::pair<unsigned, unsigned> > DefAndUseVReg;
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// MaybeDeadStores - When we need to write a value back into a stack slot,
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// keep track of the inserted store. If the stack slot value is never read
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// (because the value was used from some available register, for example), and
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// subsequently stored to, the original store is dead. This map keeps track
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// of inserted stores that are not used. If we see a subsequent store to the
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// same stack slot, the original store is deleted.
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std::map<int, MachineInstr*> MaybeDeadStores;
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bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs();
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for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end();
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MII != E; ) {
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MachineInstr &MI = *MII;
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MachineBasicBlock::iterator NextMII = MII; ++NextMII;
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ReusedOperands.clear();
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DefAndUseVReg.clear();
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// Process all of the spilled uses and all non spilled reg references.
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for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI.getOperand(i);
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if (MO.isRegister() && MO.getReg() &&
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MRegisterInfo::isPhysicalRegister(MO.getReg()))
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PhysRegsUsed[MO.getReg()] = true;
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else if (MO.isRegister() && MO.getReg() &&
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MRegisterInfo::isVirtualRegister(MO.getReg())) {
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unsigned VirtReg = MO.getReg();
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if (!VRM.hasStackSlot(VirtReg)) {
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// This virtual register was assigned a physreg!
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unsigned Phys = VRM.getPhys(VirtReg);
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PhysRegsUsed[Phys] = true;
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MI.SetMachineOperandReg(i, Phys);
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} else {
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// Is this virtual register a spilled value?
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if (MO.isUse()) {
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int StackSlot = VRM.getStackSlot(VirtReg);
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unsigned PhysReg;
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// Check to see if this stack slot is available.
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std::map<int, unsigned>::iterator SSI =
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SpillSlotsAvailable.find(StackSlot);
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if (SSI != SpillSlotsAvailable.end()) {
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DEBUG(std::cerr << "Reusing SS#" << StackSlot << " from physreg "
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<< MRI->getName(SSI->second) << " for vreg"
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<< VirtReg <<" instead of reloading into physreg "
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<< MRI->getName(VRM.getPhys(VirtReg)) << "\n");
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// If this stack slot value is already available, reuse it!
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PhysReg = SSI->second;
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MI.SetMachineOperandReg(i, PhysReg);
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// The only technical detail we have is that we don't know that
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// PhysReg won't be clobbered by a reloaded stack slot that occurs
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// later in the instruction. In particular, consider 'op V1, V2'.
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// If V1 is available in physreg R0, we would choose to reuse it
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// here, instead of reloading it into the register the allocator
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// indicated (say R1). However, V2 might have to be reloaded
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// later, and it might indicate that it needs to live in R0. When
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// this occurs, we need to have information available that
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// indicates it is safe to use R1 for the reload instead of R0.
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//
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// To further complicate matters, we might conflict with an alias,
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// or R0 and R1 might not be compatible with each other. In this
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// case, we actually insert a reload for V1 in R1, ensuring that
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// we can get at R0 or its alias.
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ReusedOperands.push_back(ReusedOp(i, StackSlot, PhysReg,
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VRM.getPhys(VirtReg)));
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++NumReused;
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} else {
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// Otherwise, reload it and remember that we have it.
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PhysReg = VRM.getPhys(VirtReg);
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RecheckRegister:
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// Note that, if we reused a register for a previous operand, the
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// register we want to reload into might not actually be
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// available. If this occurs, use the register indicated by the
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// reuser.
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if (!ReusedOperands.empty()) // This is most often empty.
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for (unsigned ro = 0, e = ReusedOperands.size(); ro != e; ++ro)
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if (ReusedOperands[ro].PhysRegReused == PhysReg) {
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// Yup, use the reload register that we didn't use before.
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PhysReg = ReusedOperands[ro].AssignedPhysReg;
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goto RecheckRegister;
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} else {
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ReusedOp &Op = ReusedOperands[ro];
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unsigned PRRU = Op.PhysRegReused;
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for (const unsigned *AS = MRI->getAliasSet(PRRU); *AS; ++AS)
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if (*AS == PhysReg) {
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// Okay, we found out that an alias of a reused register
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// was used. This isn't good because it means we have
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// to undo a previous reuse.
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MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg,
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Op.StackSlot);
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ClobberPhysReg(Op.AssignedPhysReg, SpillSlotsAvailable,
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PhysRegsAvailable);
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// Any stores to this stack slot are not dead anymore.
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MaybeDeadStores.erase(Op.StackSlot);
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MI.SetMachineOperandReg(Op.Operand, Op.AssignedPhysReg);
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PhysRegsAvailable[Op.AssignedPhysReg] = Op.StackSlot;
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SpillSlotsAvailable[Op.StackSlot] = Op.AssignedPhysReg;
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PhysRegsAvailable.erase(Op.PhysRegReused);
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DEBUG(std::cerr << "Remembering SS#" << Op.StackSlot
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<< " in physreg "
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<< MRI->getName(Op.AssignedPhysReg) << "\n");
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++NumLoads;
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DEBUG(std::cerr << '\t' << *prior(MII));
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DEBUG(std::cerr << "Reuse undone!\n");
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ReusedOperands.erase(ReusedOperands.begin()+ro);
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--NumReused;
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goto ContinueReload;
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}
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}
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ContinueReload:
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PhysRegsUsed[PhysReg] = true;
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MRI->loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot);
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// This invalidates PhysReg.
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ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable);
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// Any stores to this stack slot are not dead anymore.
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MaybeDeadStores.erase(StackSlot);
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MI.SetMachineOperandReg(i, PhysReg);
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PhysRegsAvailable[PhysReg] = StackSlot;
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SpillSlotsAvailable[StackSlot] = PhysReg;
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DEBUG(std::cerr << "Remembering SS#" << StackSlot <<" in physreg "
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<< MRI->getName(PhysReg) << "\n");
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++NumLoads;
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DEBUG(std::cerr << '\t' << *prior(MII));
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}
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// If this is both a def and a use, we need to emit a store to the
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// stack slot after the instruction. Keep track of D&U operands
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// because we already changed it to a physreg here.
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if (MO.isDef()) {
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// Remember that this was a def-and-use operand, and that the
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// stack slot is live after this instruction executes.
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DefAndUseVReg.push_back(std::make_pair(i, VirtReg));
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}
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}
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}
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}
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}
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// Loop over all of the implicit defs, clearing them from our available
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// sets.
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for (const unsigned *ImpDef = TII->getImplicitDefs(MI.getOpcode());
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*ImpDef; ++ImpDef) {
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PhysRegsUsed[*ImpDef] = true;
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ClobberPhysReg(*ImpDef, SpillSlotsAvailable, PhysRegsAvailable);
|
|
}
|
|
|
|
DEBUG(std::cerr << '\t' << MI);
|
|
|
|
// If we have folded references to memory operands, make sure we clear all
|
|
// physical registers that may contain the value of the spilled virtual
|
|
// register
|
|
VirtRegMap::MI2VirtMapTy::const_iterator I, End;
|
|
for (tie(I, End) = VRM.getFoldedVirts(&MI); I != End; ++I) {
|
|
DEBUG(std::cerr << "Folded vreg: " << I->second.first << " MR: "
|
|
<< I->second.second);
|
|
unsigned VirtReg = I->second.first;
|
|
VirtRegMap::ModRef MR = I->second.second;
|
|
if (VRM.hasStackSlot(VirtReg)) {
|
|
int SS = VRM.getStackSlot(VirtReg);
|
|
DEBUG(std::cerr << " - StackSlot: " << SS << "\n");
|
|
|
|
// If this reference is not a use, any previous store is now dead.
|
|
// Otherwise, the store to this stack slot is not dead anymore.
|
|
std::map<int, MachineInstr*>::iterator MDSI = MaybeDeadStores.find(SS);
|
|
if (MDSI != MaybeDeadStores.end()) {
|
|
if (MR & VirtRegMap::isRef) // Previous store is not dead.
|
|
MaybeDeadStores.erase(MDSI);
|
|
else {
|
|
// If we get here, the store is dead, nuke it now.
|
|
assert(MR == VirtRegMap::isMod && "Can't be modref!");
|
|
MBB.erase(MDSI->second);
|
|
MaybeDeadStores.erase(MDSI);
|
|
++NumDSE;
|
|
}
|
|
}
|
|
|
|
// If the spill slot value is available, and this is a new definition of
|
|
// the value, the value is not available anymore.
|
|
if (MR & VirtRegMap::isMod) {
|
|
std::map<int, unsigned>::iterator It = SpillSlotsAvailable.find(SS);
|
|
if (It != SpillSlotsAvailable.end()) {
|
|
PhysRegsAvailable.erase(It->second);
|
|
SpillSlotsAvailable.erase(It);
|
|
}
|
|
}
|
|
} else {
|
|
DEBUG(std::cerr << ": No stack slot!\n");
|
|
}
|
|
}
|
|
|
|
// Process all of the spilled defs.
|
|
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
|
|
MachineOperand &MO = MI.getOperand(i);
|
|
if (MO.isRegister() && MO.getReg() && MO.isDef()) {
|
|
unsigned VirtReg = MO.getReg();
|
|
|
|
bool TakenCareOf = false;
|
|
if (!MRegisterInfo::isVirtualRegister(VirtReg)) {
|
|
// Check to see if this is a def-and-use vreg operand that we do need
|
|
// to insert a store for.
|
|
bool OpTakenCareOf = false;
|
|
if (MO.isUse() && !DefAndUseVReg.empty()) {
|
|
for (unsigned dau = 0, e = DefAndUseVReg.size(); dau != e; ++dau)
|
|
if (DefAndUseVReg[dau].first == i) {
|
|
VirtReg = DefAndUseVReg[dau].second;
|
|
OpTakenCareOf = true;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!OpTakenCareOf) {
|
|
ClobberPhysReg(VirtReg, SpillSlotsAvailable, PhysRegsAvailable);
|
|
TakenCareOf = true;
|
|
}
|
|
}
|
|
|
|
if (!TakenCareOf) {
|
|
// The only vregs left are stack slot definitions.
|
|
int StackSlot = VRM.getStackSlot(VirtReg);
|
|
unsigned PhysReg;
|
|
|
|
// If this is a def&use operand, and we used a different physreg for
|
|
// it than the one assigned, make sure to execute the store from the
|
|
// correct physical register.
|
|
if (MO.getReg() == VirtReg)
|
|
PhysReg = VRM.getPhys(VirtReg);
|
|
else
|
|
PhysReg = MO.getReg();
|
|
|
|
PhysRegsUsed[PhysReg] = true;
|
|
MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot);
|
|
DEBUG(std::cerr << "Store:\t" << *next(MII));
|
|
MI.SetMachineOperandReg(i, PhysReg);
|
|
|
|
// If there is a dead store to this stack slot, nuke it now.
|
|
MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
|
|
if (LastStore) {
|
|
DEBUG(std::cerr << " Killed store:\t" << *LastStore);
|
|
++NumDSE;
|
|
MBB.erase(LastStore);
|
|
}
|
|
LastStore = next(MII);
|
|
|
|
// If the stack slot value was previously available in some other
|
|
// register, change it now. Otherwise, make the register available,
|
|
// in PhysReg.
|
|
std::map<int, unsigned>::iterator SSA =
|
|
SpillSlotsAvailable.find(StackSlot);
|
|
if (SSA != SpillSlotsAvailable.end()) {
|
|
// Remove the record for physreg.
|
|
PhysRegsAvailable.erase(SSA->second);
|
|
SpillSlotsAvailable.erase(SSA);
|
|
}
|
|
ClobberPhysReg(PhysReg, SpillSlotsAvailable, PhysRegsAvailable);
|
|
|
|
PhysRegsAvailable[PhysReg] = StackSlot;
|
|
SpillSlotsAvailable[StackSlot] = PhysReg;
|
|
DEBUG(std::cerr << "Updating SS#" << StackSlot <<" in physreg "
|
|
<< MRI->getName(PhysReg) << " for virtreg #"
|
|
<< VirtReg << "\n");
|
|
|
|
++NumStores;
|
|
VirtReg = PhysReg;
|
|
}
|
|
}
|
|
}
|
|
MII = NextMII;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
llvm::Spiller* llvm::createSpiller() {
|
|
switch (SpillerOpt) {
|
|
default: assert(0 && "Unreachable!");
|
|
case local:
|
|
return new LocalSpiller();
|
|
case simple:
|
|
return new SimpleSpiller();
|
|
}
|
|
}
|