Matthias Braun 2d1536af06 Let tablegen compute maximum lanemask for regs/regclasses. ...

Let tablegen compute the combination of subregister lanemasks for all
subregisters in a register/register class. This is preparation for further
work subregister allocation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223873 91177308-0d34-0410-b5e6-96231b3b80d8

2014-12-10 01:11:56 +00:00

..

CostTable.h

Add a overload to CostTable which allows it to infer the size of the table.

2013-08-09 19:33:32 +00:00

Target.td

[Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & x86-64 Backend

2014-12-01 22:52:56 +00:00

TargetCallingConv.h

ARM: HFAs must be passed in consecutive registers

2014-05-09 14:01:47 +00:00

TargetCallingConv.td

[mips] Remove MipsCC::analyzeCallOperands in favour of CCState::AnalyzeCallOperands. NFC

2014-11-07 11:43:49 +00:00

TargetFrameLowering.h

[Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & x86-64 Backend

2014-12-01 22:52:56 +00:00

TargetInstrInfo.h

Add Forward Control-Flow Integrity.

2014-11-11 21:08:02 +00:00

TargetIntrinsicInfo.h

Trailing whitespace.

2014-07-23 00:42:52 +00:00

TargetItinerary.td

…

TargetLibraryInfo.h

Add fortified (__*_chk) library functions to TLI (NFC)

2014-11-12 21:23:34 +00:00

TargetLowering.h

DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same divisor info FMULs by the reciprocal.

2014-11-21 06:39:58 +00:00

TargetLoweringObjectFile.h

Remove a bit of dead code.

2014-11-12 01:27:22 +00:00

TargetMachine.h

This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively

2014-11-13 09:26:31 +00:00

TargetOpcodes.h

[Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & x86-64 Backend

2014-12-01 22:52:56 +00:00

TargetOptions.h

Make sure that the TargetOptions operator== is checking the

2014-12-02 21:57:15 +00:00

TargetRegisterInfo.h

Let tablegen compute maximum lanemask for regs/regclasses.

2014-12-10 01:11:56 +00:00

TargetSchedule.td

Move Post RA Scheduling flag bit into SchedMachineModel

2014-07-15 22:39:58 +00:00

TargetSelectionDAG.td

Masked Load / Store Intrinsics - the CodeGen part.

2014-12-04 09:40:44 +00:00

TargetSelectionDAGInfo.h

Trailing whitespace.

2014-07-23 00:42:52 +00:00

TargetSubtargetInfo.h

[PBQP] Replace PBQPBuilder with composable constraints (PBQPRAConstraint).

2014-10-09 18:20:51 +00:00