Dan Gohman ca0a5d9356 Use -1ULL instead of uint64_t(-1), at Anton's suggestion. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57021 91177308-0d34-0410-b5e6-96231b3b80d8

2008-10-03 17:56:45 +00:00

..

CallingConvLower.cpp

Add "inreg" field to CallSDNode (doesn't increase

2008-09-26 19:31:26 +00:00

CMakeLists.txt

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DAGCombiner.cpp

Rename ConstantSDNode's getSignExtended to getSExtValue, for

2008-09-26 21:54:37 +00:00

FastISel.cpp

Implement fast-isel support for zero-extending from i1.

2008-10-03 01:28:47 +00:00

LegalizeDAG.cpp

Handle some 64-bit atomics on x86-32, some of the time.

2008-10-02 18:53:47 +00:00

LegalizeFloatTypes.cpp

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LegalizeIntegerTypes.cpp

The result of getSetCCResultType (eg: i32) may be larger

2008-10-03 07:41:46 +00:00

LegalizeTypes.cpp

Add "inreg" field to CallSDNode (doesn't increase

2008-09-26 19:31:26 +00:00

LegalizeTypes.h

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LegalizeTypesGeneric.cpp

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LegalizeVectorTypes.cpp

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Makefile

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ScheduleDAG.cpp

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ScheduleDAGEmit.cpp

Next round of earlyclobber handling. Approach the

2008-09-24 01:07:17 +00:00

ScheduleDAGFast.cpp

Replace the LiveRegs SmallSet with a simple counter that keeps

2008-09-23 18:50:48 +00:00

ScheduleDAGList.cpp

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ScheduleDAGRRList.cpp

Replace the LiveRegs SmallSet with a simple counter that keeps

2008-09-23 18:50:48 +00:00

SelectionDAG.cpp

Use -1ULL instead of uint64_t(-1), at Anton's suggestion.

2008-10-03 17:56:45 +00:00

SelectionDAGBuild.cpp

Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:

2008-09-26 22:10:44 +00:00

SelectionDAGBuild.h

Remove SelectionDag early allocation of registers

2008-09-24 23:13:09 +00:00

SelectionDAGISel.cpp

Fix FastISel to not initialize the PIC-base register multiple times

2008-09-29 21:55:50 +00:00

SelectionDAGPrinter.cpp

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TargetLowering.cpp

Rename ConstantSDNode's getSignExtended to getSExtValue, for

2008-09-26 21:54:37 +00:00