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2dea1fe38dccda7744bd6efdda4d4a163f057c25
llvm-6502/test/CodeGen
History
Weiming Zhao d8e31c73cd [Aarch64] Customer lowering of CTPOP to SIMD should check for NEON availability
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222292 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-19 00:29:14 +00:00
..
AArch64
[Aarch64] Customer lowering of CTPOP to SIMD should check for NEON availability
2014-11-19 00:29:14 +00:00
ARM
Fix ARM triple parsing
2014-11-17 14:08:57 +00:00
CPP
…
Generic
…
Hexagon
Handle ctor/init_array initialization.
2014-11-03 14:56:05 +00:00
Inputs
…
Mips
First stage of call lowering for Mips fast-isel
2014-11-13 23:37:45 +00:00
MSP430
…
NVPTX
[NVPTX] Add NVPTXLowerStructArgs pass
2014-11-05 18:19:30 +00:00
PowerPC
[PowerPC] Add VSX builtins for vec_div
2014-11-14 12:10:40 +00:00
R600
R600/SI: Implement areMemAccessesTriviallyDisjoint
2014-11-19 00:01:31 +00:00
SPARC
…
SystemZ
…
Thumb
[Thumb1] Re-write emitThumbRegPlusImmediate
2014-11-17 11:18:10 +00:00
Thumb2
ARM: allow constpool entry to be moved to the user's block in all cases.
2014-11-13 17:58:53 +00:00
X86
[X86][AVX] 256-bit vector stack unaligned load/stores identification
2014-11-18 23:38:19 +00:00
XCore
Fix a bit of confusion about .set and produce more readable assembly.
2014-10-21 01:17:30 +00:00
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