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2ead89ae6172d14f3926cda86ef7e78690b529da
llvm-6502/test/CodeGen
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Adrian Prantl 2ead89ae61 Reflow this comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215160 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:44:24 +00:00
..
AArch64
MachineCombiner Pass for selecting faster instruction sequence on AArch64
2014-08-07 21:40:58 +00:00
ARM
Reflow this comment.
2014-08-07 22:44:24 +00:00
CPP
…
Generic
Use "weak alias" instead of "alias weak"
2014-07-30 22:51:54 +00:00
Hexagon
DebugInfo: Assert that any CU for which debug_loc lists are emitted, has at least one range.
2014-08-06 00:21:25 +00:00
Inputs
…
Mips
fix materialization of one bit constants and global values which are accessed through
2014-08-07 22:09:01 +00:00
MSP430
…
NVPTX
[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types
2014-07-23 20:23:49 +00:00
PowerPC
[PowerPC] Swap arguments and adjust shift count for vsldoi on little endian
2014-08-05 20:47:25 +00:00
R600
R600: Cleanup fadd and fsub tests
2014-08-06 20:27:55 +00:00
SPARC
…
SystemZ
…
Thumb
[ARM] In dynamic-no-pic mode, ARM's post-RA pseudo expansion was incorrectly
2014-08-02 05:40:40 +00:00
Thumb2
ARM: do not generate BLX instructions on Cortex-M CPUs.
2014-08-06 11:13:14 +00:00
X86
[x86] Fix another miscompile found through fuzz testing the new vector
2014-08-07 10:37:35 +00:00
XCore
llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.
2014-07-04 11:58:03 +00:00
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