llvm-6502/test/MC/Disassembler
2013-11-11 18:04:07 +00:00
..
AArch64 [AArch64] Add support for NEON scalar floating-point convert to fixed-point instructions. 2013-11-11 18:04:07 +00:00
ARM [ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (Thumb encodings) 2013-11-08 16:25:50 +00:00
Mips Support for microMIPS trap instructions 1. 2013-11-07 14:35:24 +00:00
SystemZ [SystemZ] Add comparisons of high words and memory 2013-10-01 15:00:44 +00:00
X86 Add disassembler support for SSE4.1 register/register form of PEXTRW. There is a shorter encoding that was part of SSE2, but a memory form was added in SSE4.1. This is the register form of that encoding. 2013-10-14 01:42:32 +00:00
XCore