Nadav Rotem 316477dd54 Fix incorrect widening of the bitcast sdnode in case the incoming operand is integer-promoted. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147484 91177308-0d34-0410-b5e6-96231b3b80d8

2012-01-03 22:12:28 +00:00

..

CMakeLists.txt

build/CMake: Finish removal of add_llvm_library_dependencies.

2011-11-29 19:25:30 +00:00

DAGCombiner.cpp

Make sure DAGCombiner doesn't introduce multiple loads from the same memory location. PR10747, part 2.

2011-12-26 22:49:32 +00:00

FastISel.cpp

[fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle

2011-12-13 17:45:06 +00:00

FunctionLoweringInfo.cpp

An array of chars of length 8 will also cause the stack protector to be inserted

2011-11-02 23:20:58 +00:00

InstrEmitter.cpp

Add bundle aware API for querying instruction properties and switch the code

2011-12-07 07:15:52 +00:00

InstrEmitter.h

Simplify EXTRACT_SUBREG emission.

2011-10-05 20:26:40 +00:00

LegalizeDAG.cpp

Fixed a bug in SelectionDAG.cpp.

2012-01-03 11:59:04 +00:00

LegalizeFloatTypes.cpp

Added invariant field to the DAG.getLoad method and changed all calls.

2011-11-08 18:42:53 +00:00

LegalizeIntegerTypes.cpp

PR11662.

2011-12-28 13:08:20 +00:00

LegalizeTypes.cpp

Added invariant field to the DAG.getLoad method and changed all calls.

2011-11-08 18:42:53 +00:00

LegalizeTypes.h

1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC type.

2011-10-21 11:42:07 +00:00

LegalizeTypesGeneric.cpp

Remove some unnecessary includes of PseudoSourceValue.h.

2011-11-15 07:50:46 +00:00

LegalizeVectorOps.cpp

Initial CodeGen support for CTTZ/CTLZ where a zero input produces an

2011-12-13 01:56:10 +00:00

LegalizeVectorTypes.cpp

Fix incorrect widening of the bitcast sdnode in case the incoming operand is integer-promoted.

2012-01-03 22:12:28 +00:00

LLVMBuild.txt

LLVMBuild: Remove trailing newline, which irked me.

2011-12-12 19:48:00 +00:00

Makefile

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ScheduleDAGFast.cpp

- Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and

2011-06-28 19:10:37 +00:00

ScheduleDAGRRList.cpp

Make sure we correctly set LiveRegGens when a call is unscheduled. <rdar://problem/10460321>. No testcase because this is very sensitive to scheduling.

2011-12-07 22:24:28 +00:00

ScheduleDAGSDNodes.cpp

Rename TargetSubtarget to TargetSubtargetInfo for consistency.

2011-07-01 21:01:15 +00:00

ScheduleDAGSDNodes.h

The index stored in the RegDefIter is one after the current index. When getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped.

2011-06-27 18:34:12 +00:00

SDNodeDbgValue.h

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SDNodeOrdering.h

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SelectionDAG.cpp

Update DebugLoc while merging nodes at -O0.

2011-12-15 18:21:18 +00:00

SelectionDAGBuilder.cpp

Remove the restriction that target intrinsics can only involve legal types. Targets can perfects well support intrinsics on illegal types, as long as they are prepared to perform custom expansion during type legalization. For example, a target where i64 is illegal might still support the i64 intrinsic operation using pairs of i32's. ARM already does some expansions like this for non-intrinsic operations.

2012-01-03 20:09:02 +00:00

SelectionDAGBuilder.h

Add some constantness to BranchProbabilityInfo and BlockFrequnencyInfo.

2011-12-20 20:03:10 +00:00

SelectionDAGISel.cpp

Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch

2011-12-20 02:50:00 +00:00

SelectionDAGPrinter.cpp

drop unneeded config.h includes

2011-12-22 23:04:07 +00:00

TargetLowering.cpp

Add basic generic CodeGen support for half.

2011-12-20 00:02:33 +00:00

TargetSelectionDAGInfo.cpp

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