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			182 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
			
		
		
	
	
			182 lines
		
	
	
		
			6.1 KiB
		
	
	
	
		
			C++
		
	
	
	
	
	
//===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
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// 
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//                     The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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// 
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//===----------------------------------------------------------------------===//
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// 
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//
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//===----------------------------------------------------------------------===//
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#include "PowerPC.h"
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#include "PowerPCTargetMachine.h"
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#include "PowerPCFrameInfo.h"
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#include "PPC32TargetMachine.h"
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#include "PPC64TargetMachine.h"
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#include "PPC32JITInfo.h"
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#include "PPC64JITInfo.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/IntrinsicLowering.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetMachineRegistry.h"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/Support/CommandLine.h"
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#include <iostream>
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using namespace llvm;
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namespace llvm {
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  cl::opt<bool> AIX("aix", 
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                    cl::desc("Generate AIX/xcoff instead of Darwin/MachO"), 
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                    cl::Hidden);
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}
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namespace {
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  const std::string PPC32ID = "PowerPC/32bit";
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  const std::string PPC64ID = "PowerPC/64bit";
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  // Register the targets
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  RegisterTarget<PPC32TargetMachine> 
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  X("ppc32", "  PowerPC 32-bit");
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#if 0
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  RegisterTarget<PPC64TargetMachine> 
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  Y("ppc64", "  PowerPC 64-bit (unimplemented)");
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#endif
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}
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PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
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                                           IntrinsicLowering *IL,
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                                           const TargetData &TD,
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                                           const PowerPCFrameInfo &TFI,
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                                           const PowerPCJITInfo &TJI) 
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  : TargetMachine(name, IL, TD), FrameInfo(TFI), JITInfo(TJI) 
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{}
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unsigned PowerPCTargetMachine::getJITMatchQuality() {
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  return 0;
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#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
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  return 10;
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#else
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  return 0;
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#endif
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}
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/// addPassesToEmitAssembly - Add passes to the specified pass manager
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/// to implement a static compiler for this target.
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///
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bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
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                                                   std::ostream &Out) {
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  bool LP64 = (0 != dynamic_cast<PPC64TargetMachine *>(this));
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  // FIXME: Implement efficient support for garbage collection intrinsics.
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  PM.add(createLowerGCPass());
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  // FIXME: Implement the invoke/unwind instructions!
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  PM.add(createLowerInvokePass());
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  // FIXME: Implement the switch instruction in the instruction selector!
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  PM.add(createLowerSwitchPass());
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  PM.add(createLowerConstantExpressionsPass());
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  // Make sure that no unreachable blocks are instruction selected.
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  PM.add(createUnreachableBlockEliminationPass());
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  if (LP64)
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    PM.add(createPPC64ISelSimple(*this));
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  else
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    PM.add(createPPC32ISelSimple(*this));
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  if (PrintMachineCode)
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    PM.add(createMachineFunctionPrinterPass(&std::cerr));
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  PM.add(createRegisterAllocator());
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  if (PrintMachineCode)
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    PM.add(createMachineFunctionPrinterPass(&std::cerr));
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  PM.add(createPrologEpilogCodeInserter());
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  // Must run branch selection immediately preceding the asm printer
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  PM.add(createPPCBranchSelectionPass());
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  if (AIX)
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    PM.add(createAIXAsmPrinter(Out, *this));
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  else
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    PM.add(createDarwinAsmPrinter(Out, *this));
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  PM.add(createMachineCodeDeleter());
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  return false;
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}
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void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
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  // FIXME: Implement efficient support for garbage collection intrinsics.
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  PM.add(createLowerGCPass());
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  // FIXME: Implement the invoke/unwind instructions!
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  PM.add(createLowerInvokePass());
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  // FIXME: Implement the switch instruction in the instruction selector!
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  PM.add(createLowerSwitchPass());
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  PM.add(createLowerConstantExpressionsPass());
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  // Make sure that no unreachable blocks are instruction selected.
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  PM.add(createUnreachableBlockEliminationPass());
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  PM.add(createPPC32ISelSimple(TM));
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  PM.add(createRegisterAllocator());
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  PM.add(createPrologEpilogCodeInserter());
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}
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void PowerPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
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  assert(0 && "Cannot execute PowerPCJITInfo::replaceMachineCodeForFunction()");
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}
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void *PowerPCJITInfo::getJITStubForFunction(Function *F, 
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                                            MachineCodeEmitter &MCE) {
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  assert(0 && "Cannot execute PowerPCJITInfo::getJITStubForFunction()");
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  return 0;
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}
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/// PowerPCTargetMachine ctor - Create an ILP32 architecture model
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///
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PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL)
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  : PowerPCTargetMachine(PPC32ID, IL, 
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                         TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,4),
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                         PowerPCFrameInfo(*this, false), PPC32JITInfo(*this)) {}
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/// PPC64TargetMachine ctor - Create a LP64 architecture model
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///
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PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
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  : PowerPCTargetMachine(PPC64ID, IL,
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                         TargetData(PPC64ID,false,8,4,4,4,4,4,2,1,4),
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                         PowerPCFrameInfo(*this, true), PPC64JITInfo(*this)) {}
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unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
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  if (M.getEndianness()  == Module::BigEndian &&
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      M.getPointerSize() == Module::Pointer32)
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    return 10;                                   // Direct match
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  else if (M.getEndianness() != Module::AnyEndianness ||
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           M.getPointerSize() != Module::AnyPointerSize)
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    return 0;                                    // Match for some other target
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  return getJITMatchQuality()/2;
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}
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unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
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  if (M.getEndianness()  == Module::BigEndian &&
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      M.getPointerSize() == Module::Pointer64)
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    return 10;                                   // Direct match
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  else if (M.getEndianness() != Module::AnyEndianness ||
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           M.getPointerSize() != Module::AnyPointerSize)
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    return 0;                                    // Match for some other target
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  return getJITMatchQuality()/2;
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}
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