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https://github.com/c64scene-ar/llvm-6502.git
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5fe5b3dcc8
More updating of tests to be explicit about the target triple rather than relying on the default target triple supporting ARM mode. Indicate to lit that object emission is not yet available for Windows on ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205545 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
739 B
LLVM
20 lines
739 B
LLVM
; RUN: llc -mtriple=arm-eabi %s -o /dev/null
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define void @f(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
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entry:
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%a_addr = alloca i32 ; <i32*> [#uses=2]
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%b_addr = alloca i32 ; <i32*> [#uses=2]
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%c_addr = alloca i32 ; <i32*> [#uses=2]
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%d_addr = alloca i32 ; <i32*> [#uses=2]
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%e_addr = alloca i32 ; <i32*> [#uses=2]
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store i32 %a, i32* %a_addr
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store i32 %b, i32* %b_addr
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store i32 %c, i32* %c_addr
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store i32 %d, i32* %d_addr
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store i32 %e, i32* %e_addr
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call void @g( i32* %a_addr, i32* %b_addr, i32* %c_addr, i32* %d_addr, i32* %e_addr )
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ret void
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}
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declare void @g(i32*, i32*, i32*, i32*, i32*)
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