llvm-6502/test/CodeGen/ARM
Rafael Espindola 33d06bcfd4 add FNEGS and FNEGD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 17:37:35 +00:00
..
argaddr.ll
bits.ll implement shl and sra 2006-09-08 17:36:23 +00:00
branch.ll add the SETULT condition code 2006-09-03 13:19:16 +00:00
call.ll fix some bugs affecting functions with no arguments 2006-10-06 17:26:30 +00:00
constants.ll if a constant can't be an immediate, add it to the constant pool 2006-09-21 11:29:52 +00:00
dg.exp
fp.ll implement FUITOS and FUITOD 2006-10-07 14:24:52 +00:00
fparith.ll add FNEGS and FNEGD 2006-10-13 17:37:35 +00:00
fpcmp.ll implement unordered floating point compares 2006-10-13 13:14:59 +00:00
fpconv.ll uint <-> double conversion 2006-10-10 20:38:57 +00:00
hello.ll
ldr.ll
long.ll add SBCS and SUBS 2006-10-13 17:19:20 +00:00
mul.ll Implement a MachineFunctionPass to fix the mul instruction 2006-09-19 15:49:25 +00:00
ret_arg1.ll
ret_arg2.ll
ret_arg3.ll
ret_arg4.ll
ret_arg5.ll
ret_void.ll
select.ll more condition codes 2006-09-21 13:06:26 +00:00
vargs2.ll
vargs.ll