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https://github.com/c64scene-ar/llvm-6502.git
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a7ac47cee1
pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78802 91177308-0d34-0410-b5e6-96231b3b80d8
90 lines
3.4 KiB
C++
90 lines
3.4 KiB
C++
//===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "Alpha.h"
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#include "AlphaJITInfo.h"
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#include "AlphaTargetAsmInfo.h"
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#include "AlphaTargetMachine.h"
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#include "llvm/PassManager.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Target/TargetRegistry.h"
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using namespace llvm;
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extern "C" void LLVMInitializeAlphaTarget() {
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// Register the target.
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RegisterTargetMachine<AlphaTargetMachine> X(TheAlphaTarget);
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RegisterAsmInfo<AlphaTargetAsmInfo> Y(TheAlphaTarget);
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}
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AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT,
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const std::string &FS)
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: LLVMTargetMachine(T, TT),
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DataLayout("e-f128:128:128"),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
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JITInfo(*this),
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Subtarget(TT, FS),
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TLInfo(*this) {
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setRelocationModel(Reloc::PIC_);
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}
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//===----------------------------------------------------------------------===//
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// Pass Pipeline Configuration
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//===----------------------------------------------------------------------===//
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bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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PM.add(createAlphaISelDag(*this));
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return false;
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}
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bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// Must run branch selection immediately preceding the asm printer
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PM.add(createAlphaBranchSelectionPass());
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PM.add(createAlphaLLRPPass(*this));
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return false;
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}
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bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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PM.add(createAlphaCodeEmitterPass(*this, MCE));
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return false;
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}
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bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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PM.add(createAlphaJITCodeEmitterPass(*this, JCE));
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return false;
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}
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bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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PM.add(createAlphaObjectCodeEmitterPass(*this, OCE));
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return false;
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}
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bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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return addCodeEmitter(PM, OptLevel, MCE);
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}
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bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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return addCodeEmitter(PM, OptLevel, JCE);
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}
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bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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return addCodeEmitter(PM, OptLevel, OCE);
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}
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