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348da8d6b5
llvm-6502/test/CodeGen
History
Matheus Almeida f89f66e61b [mips][msa] Fix definition of SLD instruction. 
The second parameter of the SLD intrinsic is the number of columns (GPR) to 
slide left the source array.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193076 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-21 11:47:56 +00:00
..
AArch64 [AArch64] Add support for NEON scalar extract narrow instructions. 2013-10-18 14:03:24 +00:00
ARM 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets 2013-10-17 19:52:05 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips][msa] Fix definition of SLD instruction. 2013-10-21 11:47:56 +00:00
MSP430
NVPTX
PowerPC Update PPC loop tests after SCEV non-unit-stride checkin r193015. 2013-10-19 00:14:04 +00:00
R600
SPARC
SystemZ Replace sra with srl if a single sign bit is required 2013-10-17 11:16:57 +00:00
Thumb 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets 2013-10-17 19:52:05 +00:00
Thumb2
X86 Emit prefix data after debug and EH directives. 2013-10-20 02:16:21 +00:00
XCore