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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21428 91177308-0d34-0410-b5e6-96231b3b80d8
114 lines
3.5 KiB
C++
114 lines
3.5 KiB
C++
//===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines wrappers for the Target class and related global
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// functionality. This makes it easier to access the data and provides a single
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// place that needs to check it for validity. All of these classes throw
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// exceptions on error conditions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef CODEGEN_TARGET_H
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#define CODEGEN_TARGET_H
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#include "CodeGenRegisters.h"
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#include "CodeGenInstruction.h"
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#include <iosfwd>
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#include <map>
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namespace llvm {
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class Record;
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class RecordKeeper;
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struct CodeGenRegister;
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/// getValueType - Return the MVT::ValueType that the specified TableGen record
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/// corresponds to.
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MVT::ValueType getValueType(Record *Rec);
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std::ostream &operator<<(std::ostream &OS, MVT::ValueType T);
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std::string getName(MVT::ValueType T);
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std::string getEnumName(MVT::ValueType T);
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/// CodeGenTarget - This class corresponds to the Target class in the .td files.
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///
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class CodeGenTarget {
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Record *TargetRec;
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std::vector<Record*> CalleeSavedRegisters;
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MVT::ValueType PointerType;
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mutable std::map<std::string, CodeGenInstruction> Instructions;
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mutable std::vector<CodeGenRegister> Registers;
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mutable std::vector<CodeGenRegisterClass> RegisterClasses;
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void ReadRegisters() const;
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void ReadRegisterClasses() const;
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void ReadInstructions() const;
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public:
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CodeGenTarget();
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Record *getTargetRecord() const { return TargetRec; }
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const std::string &getName() const;
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const std::vector<Record*> &getCalleeSavedRegisters() const {
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return CalleeSavedRegisters;
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}
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MVT::ValueType getPointerType() const { return PointerType; }
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/// getInstructionSet - Return the InstructionSet object.
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///
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Record *getInstructionSet() const;
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/// getAsmWriter - Return the AssemblyWriter definition for this target.
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///
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Record *getAsmWriter() const;
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const std::vector<CodeGenRegister> &getRegisters() {
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if (Registers.empty()) ReadRegisters();
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return Registers;
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}
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const std::vector<CodeGenRegisterClass> getRegisterClasses() {
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if (RegisterClasses.empty()) ReadRegisterClasses();
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return RegisterClasses;
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}
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/// getInstructions - Return all of the instructions defined for this target.
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///
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const std::map<std::string, CodeGenInstruction> &getInstructions() const {
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if (Instructions.empty()) ReadInstructions();
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return Instructions;
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}
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typedef std::map<std::string,
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CodeGenInstruction>::const_iterator inst_iterator;
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inst_iterator inst_begin() const { return getInstructions().begin(); }
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inst_iterator inst_end() const { return Instructions.end(); }
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/// getInstructionsByEnumValue - Return all of the instructions defined by the
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/// target, ordered by their enum value.
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void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
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&NumberedInstructions);
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/// getPHIInstruction - Return the designated PHI instruction.
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///
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const CodeGenInstruction &getPHIInstruction() const;
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/// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
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///
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bool isLittleEndianEncoding() const;
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};
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} // End llvm namespace
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#endif
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