Jeff Cohen c4013d6772 Flesh out AMD family/models. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25755 91177308-0d34-0410-b5e6-96231b3b80d8

2006-01-28 20:30:18 +00:00

..

Alpha

Implement Promote for VAARG, and allow it to be custom promoted for people

2006-01-28 03:14:31 +00:00

CBackend

Make the C writer work with packed types. printContainedStructs is

2006-01-20 20:43:57 +00:00

IA64

Implement Promote for VAARG, and allow it to be custom promoted for people

2006-01-28 03:14:31 +00:00

PowerPC

Fix a bug in my elimination of ISD::CALL this morning. PPC now has to

2006-01-28 07:33:03 +00:00

Skeleton

PHI and INLINEASM are now built-in instructions provided by Target.td

2006-01-27 01:46:15 +00:00

Sparc

Use V8ISD::CALL instead of ISD::CALL

2006-01-27 23:30:03 +00:00

SparcV8

Use V8ISD::CALL instead of ISD::CALL

2006-01-27 23:30:03 +00:00

SparcV9

PHI and INLINEASM are now built-in instructions provided by Target.td

2006-01-27 01:46:15 +00:00

X86

Flesh out AMD family/models.

2006-01-28 20:30:18 +00:00

Makefile

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MRegisterInfo.cpp

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SubtargetFeature.cpp

Improve compatibility with VC2005, patch by Morten Ofstad!

2006-01-26 20:41:32 +00:00

Target.td

Subtarget feature can now set any variable to any value

2006-01-27 08:09:42 +00:00

TargetData.cpp

Implement a new InvalidateStructLayoutInfo method and add some comments

2006-01-14 00:07:34 +00:00

TargetFrameInfo.cpp

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TargetInstrInfo.cpp

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TargetMachine.cpp

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TargetMachineRegistry.cpp

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TargetSchedInfo.cpp

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TargetSchedule.td

Add a default NoItinerary class for targets to use.

2006-01-27 01:41:38 +00:00

TargetSelectionDAG.td

bswap implementation

2006-01-14 03:14:10 +00:00

TargetSubtarget.cpp

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