Hal Finkel 360ee97179 [PowerPC] Generate logical vector VSX instructions ... These instructions are essentially the same as their Altivec counterparts, but have access to the larger VSX register file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204782 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-26 04:55:40 +00:00
..
Analysis	ScalarEvolution: Compute exit counts for loops with a power-of-2 step.	2014-03-25 16:25:12 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen	[PowerPC] Generate logical vector VSX instructions	2014-03-26 04:55:40 +00:00
DebugInfo	DebugInfo: Add fission-related sections to COFF	2014-03-26 03:05:10 +00:00
ExecutionEngine
Feature	Prevent alias from pointing to weak aliases.	2014-03-26 04:48:47 +00:00
FileCheck
Instrumentation	[msan] Relax the test some more.	2014-03-25 14:32:05 +00:00
Integer
JitListener
Linker
LTO
MC	Correctly detect if a symbol uses a reserved section index or not.	2014-03-26 00:16:43 +00:00
Object	Teach llvm-readobj to print human friendly description of reserved sections.	2014-03-24 05:00:34 +00:00
Other
TableGen
tools	Teach llvm-readobj to print human friendly description of reserved sections.	2014-03-24 05:00:34 +00:00
Transforms	Prevent alias from pointing to weak aliases.	2014-03-26 04:48:47 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg	Refactor llvm/test/lit.cfg to use lit.util.which.	2014-03-21 17:31:35 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh