Daniel Sanders 36b0fd51de [mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6 ... Summary: Instead the system is required to provide some means of handling unaligned load/store without special instructions. Options include full hardware support, full trap-and-emulate, and hybrids such as hardware support within a cache line and trap-and-emulate for multi-line accesses. MipsSETargetLowering::allowsUnalignedMemoryAccesses() has been configured to assume that unaligned accesses are 'fast' on the basis that I expect few hardware implementations will opt for pure-software handling of unaligned accesses. The ones that do handle it purely in software can override this. mips64-load-store-left-right.ll has been merged into load-store-left-right.ll The stricter testing revealed a Bits!=Bytes bug in passByValArg(). This has been fixed and the variables renamed to clarify the units they hold. Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3872 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209512 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-23 13:18:02 +00:00
..
Analysis	Fix a bug in SCEV's backedge taken count computation from my prior fix in Jan.	2014-05-22 00:37:03 +00:00
Assembler	Fix most of PR10367.	2014-05-16 19:35:39 +00:00
Bindings
Bitcode	Add 'nonnull', a new parameter and return attribute which indicates that the pointer is not null. Instcombine will elide comparisons between these and null. Patch by Luqman Aden!	2014-05-20 01:23:40 +00:00
BugPoint
CodeGen	[mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6	2014-05-23 13:18:02 +00:00
DebugInfo	DebugInfo: Fix cross-CU references for scopes (and variables within those scopes) in abstract definitions of cross-CU inlined functions	2014-05-23 04:23:06 +00:00
ExecutionEngine	Fix testers by removing dubious testcase for r209154.	2014-05-19 19:38:48 +00:00
Feature	Fix most of PR10367.	2014-05-16 19:35:39 +00:00
FileCheck
Instrumentation	[asan] properly instrument memory accesses that have small alignment (smaller than min(8,size)) by making two checks instead of one. This may slowdown some cases, e.g. long long on 32-bit or wide loads produced after loop unrolling. The benefit is higher sencitivity.	2014-05-23 11:52:07 +00:00
Integer
JitListener
Linker	LTO: Add a testcase for linking modules with incompatible Debug Info	2014-05-19 23:41:25 +00:00
LTO
MC	[mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6	2014-05-23 13:18:02 +00:00
Object	[YAML] Add an optional argument EnumMask to the yaml::IO::bitSetCase().	2014-05-23 08:07:09 +00:00
Other	Fix most of PR10367.	2014-05-16 19:35:39 +00:00
TableGen
tools	ProfileData: Allow multiple profiles in RawInstrProfReader	2014-05-16 00:38:00 +00:00
Transforms	ScalarEvolution: Fix handling of AddRecs in isKnownPredicate	2014-05-23 00:06:56 +00:00
Unit
Verifier	Add comdat key field to llvm.global_ctors and llvm.global_dtors	2014-05-16 20:39:27 +00:00
YAMLParser
.clang-format
CMakeLists.txt	OK, NAKAMURA Takumi beat me to this change. So backing out my addition of	2014-05-19 23:26:51 +00:00
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh