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Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149672 91177308-0d34-0410-b5e6-96231b3b80d8
66 lines
2.1 KiB
C++
66 lines
2.1 KiB
C++
//===-- XCoreTargetMachine.h - Define TargetMachine for XCore ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the XCore specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef XCORETARGETMACHINE_H
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#define XCORETARGETMACHINE_H
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetData.h"
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#include "XCoreFrameLowering.h"
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#include "XCoreSubtarget.h"
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#include "XCoreInstrInfo.h"
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#include "XCoreISelLowering.h"
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#include "XCoreSelectionDAGInfo.h"
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namespace llvm {
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class XCoreTargetMachine : public LLVMTargetMachine {
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XCoreSubtarget Subtarget;
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const TargetData DataLayout; // Calculates type size & alignment
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XCoreInstrInfo InstrInfo;
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XCoreFrameLowering FrameLowering;
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XCoreTargetLowering TLInfo;
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XCoreSelectionDAGInfo TSInfo;
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public:
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XCoreTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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virtual const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; }
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virtual const XCoreFrameLowering *getFrameLowering() const {
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return &FrameLowering;
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}
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virtual const XCoreSubtarget *getSubtargetImpl() const { return &Subtarget; }
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virtual const XCoreTargetLowering *getTargetLowering() const {
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return &TLInfo;
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}
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virtual const XCoreSelectionDAGInfo* getSelectionDAGInfo() const {
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return &TSInfo;
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}
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virtual const TargetRegisterInfo *getRegisterInfo() const {
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return &InstrInfo.getRegisterInfo();
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}
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virtual const TargetData *getTargetData() const { return &DataLayout; }
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// Pass Pipeline Configuration
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virtual TargetPassConfig *createPassConfig(PassManagerBase &PM,
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bool DisableVerify);
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};
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} // end namespace llvm
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#endif
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