Adhemerval Zanella 375cbe4143 This patch fixes the Altivec addend construction for the fused multiply-add ... instruction (vmaddfp) to conform with IEEE to ensure the sign of a zero result when resulting product is -0.0. The -0.0 vector addend to vmaddfp is generated by a creating a vector with full bits sets and then shifting each elements by 31-bits to the left, resulting in a vector of 0x80000000 (or -0.0 as float). The 'buildvec_canonicalize.ll' was adjusted to reflect this change and the 'vec_mul.ll' was complemented with the float vector multiplication test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168998 91177308-0d34-0410-b5e6-96231b3b80d8		2012-11-30 13:05:44 +00:00
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ARM	Handle the situation where CodeGenPrepare removes a reference to a BB that has	2012-11-29 19:38:06 +00:00
CPP
Generic	Codegen support for arbitrary vector getelementptrs.	2012-11-13 13:01:58 +00:00
Hexagon	test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts.	2012-11-14 22:22:37 +00:00
MBlaze
Mips	[mips] Generate big GOT code.	2012-11-21 20:40:38 +00:00
MSP430	Add support for varargs functions for msp430.	2012-11-21 17:28:27 +00:00
NVPTX	Teach the legalizer how to handle operands for VSELECT nodes	2012-11-29 14:26:28 +00:00
PowerPC	This patch fixes the Altivec addend construction for the fused multiply-add	2012-11-30 13:05:44 +00:00
SPARC	Use TargetTransformInfo to control switch-to-lookup table transformation	2012-10-30 11:23:25 +00:00
Thumb	Convert an improper CodeGen test to a MC test.	2012-11-10 04:30:40 +00:00
Thumb2	Add GPRPair Register class to ARM.	2012-10-26 21:29:15 +00:00
X86	When combining consecutive stores allow loads in between the stores, if the loads do not alias.	2012-11-29 00:00:08 +00:00
XCore	Fix handling of aliases to functions.	2012-11-16 21:12:38 +00:00