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a5d0ab5553
the Altivec extensions were introduced. Its use is optional, and allows the compiler to communicate to the operating system which vector registers should be saved and restored during a context switch. In practice, this information is ignored by the various operating systems using the SVR4 ABI; the kernel saves and restores the entire register state. Setting the VRSAVE register is no longer performed by the AIX XL compilers, the IBM i compilers, or by GCC on Power Linux systems. It seems best to avoid this logic within LLVM as well. This patch avoids generating code to update and restore VRSAVE for the PowerPC SVR4 ABIs (32- and 64-bit). The code remains in place for the Darwin ABI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165656 91177308-0d34-0410-b5e6-96231b3b80d8
16 lines
479 B
LLVM
16 lines
479 B
LLVM
; RUN: llc -O0 -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s
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; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
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; This verifies that the code to update VRSAVE has been removed for SVR4.
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define <4 x float> @bar(<4 x float> %v) nounwind {
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entry:
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%v.addr = alloca <4 x float>, align 16
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store <4 x float> %v, <4 x float>* %v.addr, align 16
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%0 = load <4 x float>* %v.addr, align 16
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ret <4 x float> %0
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}
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; CHECK-NOT: mfspr
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; CHECK-NOT: mtspr
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