mirror of
https://github.com/c64scene-ar/llvm-6502.git
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f280c65b32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201487 91177308-0d34-0410-b5e6-96231b3b80d8
149 lines
3.6 KiB
LLVM
149 lines
3.6 KiB
LLVM
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
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;CHECK-LABEL: test1:
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;CHECK: vinsertps
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;CHECK: vinsertf32x4
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;CHECK: ret
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define <16 x float> @test1(<16 x float> %x, float* %br, float %y) nounwind {
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%rrr = load float* %br
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%rrr2 = insertelement <16 x float> %x, float %rrr, i32 1
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%rrr3 = insertelement <16 x float> %rrr2, float %y, i32 14
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ret <16 x float> %rrr3
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}
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;CHECK-LABEL: test2:
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;CHECK: vinsertf32x4
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;CHECK: vextractf32x4
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;CHECK: vinsertf32x4
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;CHECK: ret
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define <8 x double> @test2(<8 x double> %x, double* %br, double %y) nounwind {
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%rrr = load double* %br
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%rrr2 = insertelement <8 x double> %x, double %rrr, i32 1
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%rrr3 = insertelement <8 x double> %rrr2, double %y, i32 6
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ret <8 x double> %rrr3
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}
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;CHECK-LABEL: test3:
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;CHECK: vextractf32x4
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;CHECK: vinsertf32x4
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;CHECK: ret
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define <16 x float> @test3(<16 x float> %x) nounwind {
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%eee = extractelement <16 x float> %x, i32 4
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%rrr2 = insertelement <16 x float> %x, float %eee, i32 1
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ret <16 x float> %rrr2
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}
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;CHECK-LABEL: test4:
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;CHECK: vextracti32x4
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;CHECK: vinserti32x4
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;CHECK: ret
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define <8 x i64> @test4(<8 x i64> %x) nounwind {
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%eee = extractelement <8 x i64> %x, i32 4
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%rrr2 = insertelement <8 x i64> %x, i64 %eee, i32 1
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ret <8 x i64> %rrr2
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}
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;CHECK-LABEL: test5:
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;CHECK: vextractps
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;CHECK: ret
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define i32 @test5(<4 x float> %x) nounwind {
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%ef = extractelement <4 x float> %x, i32 3
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%ei = bitcast float %ef to i32
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ret i32 %ei
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}
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;CHECK-LABEL: test6:
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;CHECK: vextractps {{.*}}, (%rdi)
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;CHECK: ret
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define void @test6(<4 x float> %x, float* %out) nounwind {
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%ef = extractelement <4 x float> %x, i32 3
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store float %ef, float* %out, align 4
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ret void
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}
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;CHECK-LABEL: test7
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;CHECK: vmovd
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;CHECK: vpermps %zmm
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;CHECK: ret
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define float @test7(<16 x float> %x, i32 %ind) nounwind {
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%e = extractelement <16 x float> %x, i32 %ind
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ret float %e
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}
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;CHECK-LABEL: test8
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;CHECK: vmovq
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;CHECK: vpermpd %zmm
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;CHECK: ret
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define double @test8(<8 x double> %x, i32 %ind) nounwind {
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%e = extractelement <8 x double> %x, i32 %ind
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ret double %e
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}
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;CHECK-LABEL: test9
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;CHECK: vmovd
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;CHECK: vpermps %ymm
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;CHECK: ret
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define float @test9(<8 x float> %x, i32 %ind) nounwind {
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%e = extractelement <8 x float> %x, i32 %ind
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ret float %e
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}
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;CHECK-LABEL: test10
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;CHECK: vmovd
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;CHECK: vpermd %zmm
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;CHEKK: vmovdz %xmm0, %eax
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;CHECK: ret
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define i32 @test10(<16 x i32> %x, i32 %ind) nounwind {
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%e = extractelement <16 x i32> %x, i32 %ind
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ret i32 %e
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}
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;CHECK-LABEL: test11
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;CHECK: vpcmpltud
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;CKECK: kshiftlw $11
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;CKECK: kshiftrw $15
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;CHECK: kortestw
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;CHECK: je
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;CHECK: ret
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;CHECK: ret
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define <16 x i32> @test11(<16 x i32>%a, <16 x i32>%b) {
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%cmp_res = icmp ult <16 x i32> %a, %b
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%ia = extractelement <16 x i1> %cmp_res, i32 4
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br i1 %ia, label %A, label %B
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A:
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ret <16 x i32>%b
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B:
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%c = add <16 x i32>%b, %a
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ret <16 x i32>%c
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}
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;CHECK-LABEL: test12
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;CHECK: vpcmpgtq
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;CKECK: kshiftlw $15
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;CKECK: kshiftrw $15
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;CHECK: kortestw
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;CHECK: ret
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define i64 @test12(<16 x i64>%a, <16 x i64>%b, i64 %a1, i64 %b1) {
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%cmpvector_func.i = icmp slt <16 x i64> %a, %b
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%extract24vector_func.i = extractelement <16 x i1> %cmpvector_func.i, i32 0
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%res = select i1 %extract24vector_func.i, i64 %a1, i64 %b1
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ret i64 %res
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}
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;CHECK-LABEL: test13
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;CHECK: cmpl
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;CHECK: sbbl
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;CKECK: orl $65532
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;CHECK: ret
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define i16 @test13(i32 %a, i32 %b) {
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%cmp_res = icmp ult i32 %a, %b
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%maskv = insertelement <16 x i1> <i1 true, i1 false, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, i1 %cmp_res, i32 0
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%res = bitcast <16 x i1> %maskv to i16
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ret i16 %res
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}
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