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https://github.com/c64scene-ar/llvm-6502.git
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4aa8bdaa46
There is no advantage in being different and using the same names simplifies clang a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189141 91177308-0d34-0410-b5e6-96231b3b80d8
139 lines
3.5 KiB
LLVM
139 lines
3.5 KiB
LLVM
; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx,+rdrnd,+rdseed | FileCheck %s
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define i32 @foo(<2 x i64> %c, i32 %a, i32 %b) {
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%t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c)
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%t2 = icmp ne i32 %t1, 0
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%t3 = select i1 %t2, i32 %a, i32 %b
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ret i32 %t3
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; CHECK: foo
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; CHECK: ptest
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; CHECK-NOT: testl
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; CHECK: cmov
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; CHECK: ret
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}
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define i32 @bar(<2 x i64> %c) {
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entry:
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%0 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c)
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%1 = icmp ne i32 %0, 0
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br i1 %1, label %if-true-block, label %endif-block
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if-true-block: ; preds = %entry
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ret i32 0
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endif-block: ; preds = %entry,
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ret i32 1
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; CHECK: bar
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; CHECK: ptest
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; CHECK-NOT: testl
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; CHECK: jne
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; CHECK: ret
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}
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define i32 @bax(<2 x i64> %c) {
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%t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c)
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%t2 = icmp eq i32 %t1, 1
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%t3 = zext i1 %t2 to i32
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ret i32 %t3
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; CHECK: bax
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; CHECK: ptest
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; CHECK-NOT: cmpl
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; CHECK: ret
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}
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define i16 @rnd16(i16 %arg) nounwind uwtable {
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%1 = tail call { i16, i32 } @llvm.x86.rdrand.16() nounwind
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%2 = extractvalue { i16, i32 } %1, 0
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%3 = extractvalue { i16, i32 } %1, 1
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%4 = icmp eq i32 %3, 0
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%5 = select i1 %4, i16 0, i16 %arg
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%6 = add i16 %5, %2
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ret i16 %6
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; CHECK: rnd16
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; CHECK: rdrand
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; CHECK: cmov
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; CHECK-NOT: cmov
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; CHECK: ret
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}
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define i32 @rnd32(i32 %arg) nounwind uwtable {
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%1 = tail call { i32, i32 } @llvm.x86.rdrand.32() nounwind
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%2 = extractvalue { i32, i32 } %1, 0
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%3 = extractvalue { i32, i32 } %1, 1
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%4 = icmp eq i32 %3, 0
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%5 = select i1 %4, i32 0, i32 %arg
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%6 = add i32 %5, %2
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ret i32 %6
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; CHECK: rnd32
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; CHECK: rdrand
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; CHECK: cmov
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; CHECK-NOT: cmov
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; CHECK: ret
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}
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define i64 @rnd64(i64 %arg) nounwind uwtable {
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%1 = tail call { i64, i32 } @llvm.x86.rdrand.64() nounwind
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%2 = extractvalue { i64, i32 } %1, 0
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%3 = extractvalue { i64, i32 } %1, 1
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%4 = icmp eq i32 %3, 0
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%5 = select i1 %4, i64 0, i64 %arg
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%6 = add i64 %5, %2
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ret i64 %6
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; CHECK: rnd64
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; CHECK: rdrand
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; CHECK: cmov
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; CHECK-NOT: cmov
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; CHECK: ret
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}
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define i16 @seed16(i16 %arg) nounwind uwtable {
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%1 = tail call { i16, i32 } @llvm.x86.rdseed.16() nounwind
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%2 = extractvalue { i16, i32 } %1, 0
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%3 = extractvalue { i16, i32 } %1, 1
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%4 = icmp eq i32 %3, 0
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%5 = select i1 %4, i16 0, i16 %arg
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%6 = add i16 %5, %2
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ret i16 %6
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; CHECK: seed16
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; CHECK: rdseed
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; CHECK: cmov
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; CHECK-NOT: cmov
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; CHECK: ret
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}
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define i32 @seed32(i32 %arg) nounwind uwtable {
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%1 = tail call { i32, i32 } @llvm.x86.rdseed.32() nounwind
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%2 = extractvalue { i32, i32 } %1, 0
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%3 = extractvalue { i32, i32 } %1, 1
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%4 = icmp eq i32 %3, 0
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%5 = select i1 %4, i32 0, i32 %arg
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%6 = add i32 %5, %2
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ret i32 %6
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; CHECK: seed32
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; CHECK: rdseed
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; CHECK: cmov
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; CHECK-NOT: cmov
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; CHECK: ret
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}
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define i64 @seed64(i64 %arg) nounwind uwtable {
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%1 = tail call { i64, i32 } @llvm.x86.rdseed.64() nounwind
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%2 = extractvalue { i64, i32 } %1, 0
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%3 = extractvalue { i64, i32 } %1, 1
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%4 = icmp eq i32 %3, 0
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%5 = select i1 %4, i64 0, i64 %arg
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%6 = add i64 %5, %2
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ret i64 %6
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; CHECK: seed64
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; CHECK: rdseed
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; CHECK: cmov
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; CHECK-NOT: cmov
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; CHECK: ret
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}
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declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
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declare { i16, i32 } @llvm.x86.rdrand.16() nounwind
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declare { i32, i32 } @llvm.x86.rdrand.32() nounwind
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declare { i64, i32 } @llvm.x86.rdrand.64() nounwind
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declare { i16, i32 } @llvm.x86.rdseed.16() nounwind
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declare { i32, i32 } @llvm.x86.rdseed.32() nounwind
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declare { i64, i32 } @llvm.x86.rdseed.64() nounwind
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