llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-05 14:34:55 +00:00

History

Silviu Baranga 3f11cd0d25 [ARM] When generating a vpaddl node the input lane type is not always the type of the

add operation since extract_vector_elt can perform an extend operation. Get the input lane
type from the vector on which we're performing the vpaddl operation on and extend or
truncate it to the output type of the original add node.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205523 91177308-0d34-0410-b5e6-96231b3b80d8

2014-04-03 10:44:27 +00:00

AArch64

[AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS

2014-03-27 16:28:09 +00:00

ARM

[ARM] When generating a vpaddl node the input lane type is not always the type of the

2014-04-03 10:44:27 +00:00

ARM64

ARM64: add regression test for r205519.

2014-04-03 09:36:05 +00:00

CPP

…