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Sean Callanan
38fee0edcf
Added a new register class for segment registers
to the Intel register table. Added 16- and 64-bit MOVs to and from the segment registers to the Intel instruction tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81895 91177308-0d34-0410-b5e6-96231b3b80d8
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