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d1980a5acd
related transformations out of target-specific dag combine into the
ARM backend. These were added by Evan in r37685 with no testcases
and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll).
Add some simple X86-specific (for now) DAG combines that turn things
like cond ? 8 : 0 -> (zext(cond) << 3). This happens frequently
with the recently added cp constant select optimization, but is a
very general xform. For example, we now compile the second example
in const-select.ll to:
_test:
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
seta %al
movzbl %al, %eax
movl 4(%esp), %ecx
movsbl (%ecx,%eax,4), %eax
ret
instead of:
_test:
movl 4(%esp), %eax
leal 4(%eax), %ecx
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
cmovbe %eax, %ecx
movsbl (%ecx), %eax
ret
This passes multisource and dejagnu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66779 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
820 B
LLVM
23 lines
820 B
LLVM
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin7"
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; RUN: llvm-as < %s | llc | grep {LCPI1_0(,%eax,4)}
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define float @f(i32 %x) nounwind readnone {
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entry:
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%0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
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%iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 ; <float> [#uses=1]
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ret float %iftmp.0.0
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}
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; RUN: llvm-as < %s | llc | grep {movsbl.*(%e.x,%e.x,4), %eax}
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define signext i8 @test(i8* nocapture %P, double %F) nounwind readonly {
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entry:
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%0 = fcmp olt double %F, 4.200000e+01 ; <i1> [#uses=1]
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%iftmp.0.0 = select i1 %0, i32 4, i32 0 ; <i32> [#uses=1]
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%1 = getelementptr i8* %P, i32 %iftmp.0.0 ; <i8*> [#uses=1]
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%2 = load i8* %1, align 1 ; <i8> [#uses=1]
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ret i8 %2
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}
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