Evan Cheng 4a51708448 Fix fall outs from my recent change on how carry bit is modeled during isel. ...

Now the 'S' instructions, e.g. ADDS, treat S bit as optional operand as well.
Also fix isel hook to correctly set the optional operand.
rdar://10073745


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139157 91177308-0d34-0410-b5e6-96231b3b80d8

2011-09-06 18:52:20 +00:00

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Alpha

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ARM

Fix fall outs from my recent change on how carry bit is modeled during isel.

2011-09-06 18:52:20 +00:00

Blackfin

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CBackend

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CellSPU

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CPP

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Generic

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MBlaze

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Mips

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MSP430

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PowerPC

Split the init.trampoline intrinsic, which currently combines GCC's

2011-09-06 13:37:06 +00:00

PTX

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SPARC

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SystemZ

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Thumb

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Thumb2

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X86

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XCore

Split the init.trampoline intrinsic, which currently combines GCC's

2011-09-06 13:37:06 +00:00