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https://github.com/c64scene-ar/llvm-6502.git
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aa5b9c0f6f
be deleted. This will be reapplied as soon as possible and before the 3.6 branch date at any rate. Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reverts commits r215111, 215115, 215116, 215117, 215136. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215154 91177308-0d34-0410-b5e6-96231b3b80d8
84 lines
2.6 KiB
C++
84 lines
2.6 KiB
C++
//===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Mips specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MIPSTARGETMACHINE_H
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#define MIPSTARGETMACHINE_H
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#include "MipsSubtarget.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class formatted_raw_ostream;
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class MipsRegisterInfo;
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class MipsTargetMachine : public LLVMTargetMachine {
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MipsSubtarget *Subtarget;
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MipsSubtarget DefaultSubtarget;
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MipsSubtarget NoMips16Subtarget;
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MipsSubtarget Mips16Subtarget;
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public:
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MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
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const TargetOptions &Options, Reloc::Model RM,
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CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
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virtual ~MipsTargetMachine() {}
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void addAnalysisPasses(PassManagerBase &PM) override;
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const MipsSubtarget *getSubtargetImpl() const override {
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if (Subtarget)
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return Subtarget;
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return &DefaultSubtarget;
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}
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MipsSubtarget *getSubtargetImpl() {
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return static_cast<MipsSubtarget *>(TargetMachine::getSubtargetImpl());
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}
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/// \brief Reset the subtarget for the Mips target.
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void resetSubtarget(MachineFunction *MF);
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// Pass Pipeline Configuration
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
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};
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/// MipsebTargetMachine - Mips32/64 big endian target machine.
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///
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class MipsebTargetMachine : public MipsTargetMachine {
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virtual void anchor();
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public:
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MipsebTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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/// MipselTargetMachine - Mips32/64 little endian target machine.
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///
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class MipselTargetMachine : public MipsTargetMachine {
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virtual void anchor();
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public:
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MipselTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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};
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} // End llvm namespace
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#endif
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