llvm-6502/test/CodeGen
Chad Rosier 168a1af83c Revert "[AArch64] This is a work in progress to provide a machine description"
This reverts commit ff717c8fc786a0cfa1602982b91895fa09e514fc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202773 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-04 00:32:07 +00:00
..
AArch64 Revert "[AArch64] This is a work in progress to provide a machine description" 2014-03-04 00:32:07 +00:00
ARM Debug info: Remove ARMAsmPrinter::EmitDwarfRegOp(). AsmPrinter can now 2014-02-27 17:56:08 +00:00
CPP
Generic CommandLine: Exit successfully for -version and -help 2014-02-28 19:08:01 +00:00
Hexagon
Inputs
Mips [mips] Prevent %lo relocation being used on MSA loads and stores. 2014-03-03 14:31:21 +00:00
MSP430
NVPTX
PowerPC Add a PPC inline asm constraint type for single CR bits 2014-03-02 18:23:39 +00:00
R600 R600: Add failing control flow tests. 2014-03-01 21:45:41 +00:00
SPARC [Sparc] Add support for parsing directives in SparcAsmParser. 2014-03-01 02:18:04 +00:00
SystemZ
Thumb
Thumb2 ARMv8 IfConversion must skip narrow instructions that a) define CPSR and b) wouldn't affect CPSR in an IT block 2014-02-26 11:27:28 +00:00
X86 AVX-512: Fixed extract_vector_elt for v8i1 vector 2014-03-02 09:19:44 +00:00
XCore [XCore] Support functions returning more than 4 words. 2014-02-27 17:47:54 +00:00