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212ec3a739
Rafael opened http://llvm.org/bugs/show_bug.cgi?id=19893 to track non-optimal code generation for forming a function address that is local to the compile unit. The existing code was treating both local and non-local functions identically. This patch fixes the problem by properly identifying local functions and generating the proper addis/addi code. I also noticed that Rafael's earlier changes to correct the surrounding code in PPCISelLowering.cpp were also needed for fast instruction selection in PPCFastISel.cpp, so this patch fixes that code as well. The existing test/CodeGen/PowerPC/func-addr.ll is modified to test the new code generation. I've added a -O0 run line to test the fast-isel code as well. Tested on powerpc64[le]-unknown-linux-gnu with no regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211056 91177308-0d34-0410-b5e6-96231b3b80d8
18 lines
387 B
LLVM
18 lines
387 B
LLVM
; RUN: llc -mtriple powerpc64-linux < %s | FileCheck %s
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; RUN: llc -O0 -mtriple powerpc64-linux < %s | FileCheck %s
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define void @foo() {
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ret void
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}
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declare i32 @bar(i8*)
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; CHECK-LABEL: {{^}}zed:
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; CHECK: addis 3, 2, foo@toc@ha
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; CHECK-NEXT: addi 3, 3, foo@toc@l
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; CHECK-NEXT: bl bar
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define void @zed() {
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call i32 @bar(i8* bitcast (void ()* @foo to i8*))
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ret void
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}
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