Chad Rosier 3b370a2ac4 [AArch64] Add support for NEON scalar three register different instruction ... class. The instruction class includes the signed saturating doubling multiply-add long, signed saturating doubling multiply-subtract long, and the signed saturating doubling multiply long instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192908 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-17 18:12:29 +00:00
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AArch64	[AArch64] Add support for NEON scalar three register different instruction	2013-10-17 18:12:29 +00:00
ARM
Mips
SystemZ
X86	Add disassembler support for SSE4.1 register/register form of PEXTRW. There is a shorter encoding that was part of SSE2, but a memory form was added in SSE4.1. This is the register form of that encoding.	2013-10-14 01:42:32 +00:00
XCore