llvm-6502/test/MC/Disassembler/AArch64
Chad Rosier 3b370a2ac4 [AArch64] Add support for NEON scalar three register different instruction
class.  The instruction class includes the signed saturating doubling
multiply-add long, signed saturating doubling multiply-subtract long, and
the signed saturating doubling multiply long instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192908 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-17 18:12:29 +00:00
..
a64-ignored-fields.txt AArch64: remove post-encoder method from FCMP (immediate) instructions. 2013-02-28 14:46:14 +00:00
basic-a64-instructions.txt Add AArch64 CRC32 instructions 2013-02-06 09:13:13 +00:00
basic-a64-undefined.txt
basic-a64-unpredictable.txt
gicv3-regs.txt AArch64: implement GICv3 system registers 2013-03-28 14:30:46 +00:00
ldp-offset-predictable.txt
ldp-postind.predictable.txt
ldp-preind.predictable.txt
lit.local.cfg [tests] Cleanup initialization of test suffixes. 2013-08-16 00:37:11 +00:00
neon-instructions.txt [AArch64] Add support for NEON scalar three register different instruction 2013-10-17 18:12:29 +00:00
trace-regs.txt AArch64: implement ETMv4 trace system registers. 2013-04-03 12:31:29 +00:00