Chris Lattner 3cb7187d5f fix the int<->fp instructions, which apparently take a single float register ...

to represent the int part (because it's always 32-bits)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24976 91177308-0d34-0410-b5e6-96231b3b80d8

2005-12-23 05:00:16 +00:00

..

Alpha

remove dead code

2005-12-22 21:16:08 +00:00

CBackend

do not allow '.' in symbol names

2005-11-10 21:39:29 +00:00

IA64

remove dead code

2005-12-22 21:16:08 +00:00

PowerPC

Simplify some code by using BIT_CONVERT

2005-12-23 00:59:59 +00:00

Skeleton

Support multiple ValueTypes per RegisterClass, needed for upcoming vector

2005-12-01 04:51:06 +00:00

Sparc

fix the int<->fp instructions, which apparently take a single float register

2005-12-23 05:00:16 +00:00

SparcV8

fix the int<->fp instructions, which apparently take a single float register

2005-12-23 05:00:16 +00:00

SparcV9

Support multiple ValueTypes per RegisterClass, needed for upcoming vector

2005-12-01 04:51:06 +00:00

X86

Bye bye HACKTROCITY.

2005-12-22 02:26:21 +00:00

Makefile

DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now

2005-10-24 02:26:13 +00:00

MRegisterInfo.cpp

…

SubtargetFeature.cpp

Preparation of supporting scheduling info. Need to find info based on selected

2005-10-25 15:15:28 +00:00

Target.td

Added support to specify predicates.

2005-12-14 22:02:59 +00:00

TargetData.cpp

…

TargetFrameInfo.cpp

…

TargetInstrInfo.cpp

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TargetMachine.cpp

…

TargetMachineRegistry.cpp

…

TargetSchedInfo.cpp

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TargetSchedule.td

add a marker

2005-10-23 22:07:20 +00:00

TargetSelectionDAG.td

Added special flag node FLAG.

2005-12-22 02:25:14 +00:00

TargetSubtarget.cpp

…