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3d36a9f6f4
1. Remove redundant type casts now that PR673 is implemented. 2. Implement the OUT*ir instructions correctly. The port number really *is* a 16-bit value, but the patterns should only match if the number is 0-255. Update the patterns so they now match. 3. Fix patterns for shifts to reflect that the shift amount is always an i8, not an i16 as they were believed to be before. This previous fib stopped working when we started knowing that CL has type i8. 4. Change use of i16i8imm in SH*ri patterns to all be imm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
.cvsignore | ||
Makefile | ||
README.txt | ||
X86.h | ||
X86.td | ||
X86AsmPrinter.cpp | ||
X86AsmPrinter.h | ||
X86ATTAsmPrinter.cpp | ||
X86ATTAsmPrinter.h | ||
X86CodeEmitter.cpp | ||
X86ELFWriter.cpp | ||
X86FloatingPoint.cpp | ||
X86InstrBuilder.h | ||
X86InstrInfo.cpp | ||
X86InstrInfo.h | ||
X86InstrInfo.td | ||
X86IntelAsmPrinter.cpp | ||
X86IntelAsmPrinter.h | ||
X86ISelDAGToDAG.cpp | ||
X86ISelLowering.cpp | ||
X86ISelLowering.h | ||
X86ISelPattern.cpp | ||
X86JITInfo.cpp | ||
X86JITInfo.h | ||
X86PeepholeOpt.cpp | ||
X86RegisterInfo.cpp | ||
X86RegisterInfo.h | ||
X86RegisterInfo.td | ||
X86Relocations.h | ||
X86Subtarget.cpp | ||
X86Subtarget.h | ||
X86TargetMachine.cpp | ||
X86TargetMachine.h |
//===---------------------------------------------------------------------===// // Random ideas for the X86 backend. //===---------------------------------------------------------------------===// Add a MUL2U and MUL2S nodes to represent a multiply that returns both the Hi and Lo parts (combination of MUL and MULH[SU] into one node). Add this to X86, & make the dag combiner produce it when needed. This will eliminate one imul from the code generated for: long long test(long long X, long long Y) { return X*Y; } by using the EAX result from the mul. We should add a similar node for DIVREM. another case is: long long test(int X, int Y) { return (long long)X*Y; } ... which should only be one imul instruction. //===---------------------------------------------------------------------===// This should be one DIV/IDIV instruction, not a libcall: unsigned test(unsigned long long X, unsigned Y) { return X/Y; } This can be done trivially with a custom legalizer. What about overflow though? http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14224 //===---------------------------------------------------------------------===// Need to add support for rotate instructions. //===---------------------------------------------------------------------===// Some targets (e.g. athlons) prefer freep to fstp ST(0): http://gcc.gnu.org/ml/gcc-patches/2004-04/msg00659.html //===---------------------------------------------------------------------===// This should use faddi on chips where it is profitable: double foo(double P, int *I) { return P+*I; } //===---------------------------------------------------------------------===// The FP stackifier needs to be global. Also, it should handle simple permutates to reduce number of shuffle instructions, e.g. turning: fld P -> fld Q fld Q fld P fxch or: fxch -> fucomi fucomi jl X jg X //===---------------------------------------------------------------------===// Improvements to the multiply -> shift/add algorithm: http://gcc.gnu.org/ml/gcc-patches/2004-08/msg01590.html //===---------------------------------------------------------------------===// Improve code like this (occurs fairly frequently, e.g. in LLVM): long long foo(int x) { return 1LL << x; } http://gcc.gnu.org/ml/gcc-patches/2004-09/msg01109.html http://gcc.gnu.org/ml/gcc-patches/2004-09/msg01128.html http://gcc.gnu.org/ml/gcc-patches/2004-09/msg01136.html Another useful one would be ~0ULL >> X and ~0ULL << X. //===---------------------------------------------------------------------===// Should support emission of the bswap instruction, probably by adding a new DAG node for byte swapping. Also useful on PPC which has byte-swapping loads. //===---------------------------------------------------------------------===// Compile this: _Bool f(_Bool a) { return a!=1; } into: movzbl %dil, %eax xorl $1, %eax ret