Vincent Lejeune 62b0a9b1e6 R600: Do not predicate vector op ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176507 91177308-0d34-0410-b5e6-96231b3b80d8

2013-03-05 19:12:06 +00:00

..

InstPrinter

R600/SI: add all the other missing asm operands v2

2013-02-21 15:17:22 +00:00

MCTargetDesc

R600/SI: remove GPR*AlignEncode

2013-03-01 09:46:17 +00:00

TargetInfo

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AMDGPU.h

R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.

2013-03-05 15:04:55 +00:00

AMDGPU.td

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AMDGPUAsmPrinter.cpp

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AMDGPUAsmPrinter.h

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AMDGPUConvertToISA.cpp

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AMDGPUFrameLowering.cpp

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AMDGPUFrameLowering.h

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AMDGPUIndirectAddressing.cpp

R600: Fix tracking of implicit defs in the IndirectAddressing pass

2013-02-19 15:22:42 +00:00

AMDGPUInstrInfo.cpp

R600/SI: add VOP mapping functions

2013-02-26 17:52:42 +00:00

AMDGPUInstrInfo.h

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AMDGPUInstrInfo.td

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AMDGPUInstructions.td

R600/SI: simplify VOPC_* pattern v2

2013-02-21 15:17:04 +00:00

AMDGPUIntrinsics.td

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AMDGPUISelLowering.cpp

R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern

2013-02-18 14:11:28 +00:00

AMDGPUISelLowering.h

R600/SI: add folding helper

2013-02-26 17:52:16 +00:00

AMDGPUMCInstLower.cpp

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AMDGPUMCInstLower.h

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AMDGPURegisterInfo.cpp

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AMDGPURegisterInfo.h

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AMDGPURegisterInfo.td

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AMDGPUStructurizeCFG.cpp

R600/SI: fix warning about overloaded virtual

2013-03-01 09:46:11 +00:00

AMDGPUSubtarget.cpp

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AMDGPUSubtarget.h

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AMDGPUTargetMachine.cpp

R600: initial scheduler code

2013-03-05 18:41:32 +00:00

AMDGPUTargetMachine.h

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AMDIL7XXDevice.cpp

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AMDIL7XXDevice.h

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AMDIL.h

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AMDILBase.td

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AMDILCFGStructurizer.cpp

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AMDILDevice.cpp

R600: Clean up datalayout strings so they better match hardware capabilities

2013-03-04 17:40:28 +00:00

AMDILDevice.h

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AMDILDeviceInfo.cpp

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AMDILDeviceInfo.h

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AMDILDevices.h

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AMDILEvergreenDevice.cpp

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AMDILEvergreenDevice.h

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AMDILInstrInfo.td

R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern

2013-02-18 14:11:28 +00:00

AMDILIntrinsicInfo.cpp

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AMDILIntrinsicInfo.h

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AMDILIntrinsics.td

R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern

2013-02-18 14:11:28 +00:00

AMDILISelDAGToDAG.cpp

R600: Turn BUILD_VECTOR into Reg_Sequence

2013-03-05 15:04:49 +00:00

AMDILISelLowering.cpp

R600: Update for name changes from r175667.

2013-02-20 21:31:28 +00:00

AMDILNIDevice.cpp

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AMDILNIDevice.h

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AMDILPeepholeOptimizer.cpp

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AMDILRegisterInfo.td

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AMDILSIDevice.cpp

R600: Clean up datalayout strings so they better match hardware capabilities

2013-03-04 17:40:28 +00:00

AMDILSIDevice.h

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CMakeLists.txt

Update cmake build.

2013-03-05 18:54:05 +00:00

LLVMBuild.txt

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Makefile

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Processors.td

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R600Defines.h

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R600ExpandSpecialInstrs.cpp

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R600InstrInfo.cpp

R600: Do not predicate vector op

2013-03-05 19:12:06 +00:00

R600InstrInfo.h

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R600Instructions.td

R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.

2013-03-05 15:04:55 +00:00

R600Intrinsics.td

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R600ISelLowering.cpp

R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.

2013-03-05 15:04:55 +00:00

R600ISelLowering.h

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R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

R600: initial scheduler code

2013-03-05 18:41:32 +00:00

R600MachineScheduler.h

R600: initial scheduler code

2013-03-05 18:41:32 +00:00

R600RegisterInfo.cpp

R600: Mark all members of the TRegMem register class as reserved

2013-02-19 15:22:45 +00:00

R600RegisterInfo.h

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R600RegisterInfo.td

R600: Add AR_X to the R600_TReg_X register class.

2013-02-19 15:22:47 +00:00

R600Schedule.td

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SIAnnotateControlFlow.cpp

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SIAssignInterpRegs.cpp

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SIInsertWaits.cpp

R600/SI: fix inserting waits for unordered defines

2013-03-01 09:46:04 +00:00

SIInstrFormats.td

R600/SI: remove GPR*AlignEncode

2013-03-01 09:46:17 +00:00

SIInstrInfo.cpp

R600/SI: handle all registers in copyPhysReg v2

2013-03-01 09:46:27 +00:00

SIInstrInfo.h

R600/SI: add VOP mapping functions

2013-02-26 17:52:42 +00:00

SIInstrInfo.td

R600/SI: remove GPR*AlignEncode

2013-03-01 09:46:17 +00:00

SIInstructions.td

R600/SI: remove S_MOV immediate patterns

2013-03-01 09:46:22 +00:00

SIIntrinsics.td

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SIISelLowering.cpp

R600/SI: Add promotion of e32 to e64 in operand folding

2013-02-26 17:52:47 +00:00

SIISelLowering.h

R600/SI: add post ISel folding for SI v2

2013-02-26 17:52:23 +00:00

SILowerControlFlow.cpp

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SIMachineFunctionInfo.cpp

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SIMachineFunctionInfo.h

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SIRegisterInfo.cpp

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SIRegisterInfo.h

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SIRegisterInfo.td

R600/SI: fix and cleanup SI register definition v2

2013-02-26 17:52:03 +00:00

SISchedule.td

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