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llvm-6502/lib/Target
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Misha Brukman 3df04c58fc Synthetic instructions RET and RETL need to have all 3 parameters specified 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17002 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 22:32:49 +00:00
..
CBackend
Update to reflect changes in Makefile rules.
2004-10-13 11:46:52 +00:00
PowerPC
* Claim to support machine code emission - return false from
2004-10-14 06:39:56 +00:00
Skeleton
Update to reflect changes in Makefile rules.
2004-10-13 11:46:52 +00:00
Sparc
Synthetic instructions RET and RETL need to have all 3 parameters specified
2004-10-14 22:32:49 +00:00
SparcV8
Synthetic instructions RET and RETL need to have all 3 parameters specified
2004-10-14 22:32:49 +00:00
SparcV9
Checking in code that works on my simple test case. However, there is still a bug with branches that I need to fix.
2004-10-14 06:04:28 +00:00
X86
Update to reflect changes in Makefile rules.
2004-10-13 11:46:52 +00:00
Makefile
Targets are independent of each other, so compile them in parallel
2004-09-15 01:34:25 +00:00
Makefile.am
Update to reflect changes in Makefile rules.
2004-10-13 11:46:52 +00:00
MRegisterInfo.cpp
Add getAllocatableSet() function.
2004-08-26 22:21:04 +00:00
Target.td
Add isLittleEndianEncoding to InstrInfo class, defaults to `off'
2004-10-14 05:53:40 +00:00
TargetData.cpp
Changes For Bug 352
2004-09-01 22:55:40 +00:00
TargetFrameInfo.cpp
Remove dead methods
2004-08-12 18:37:15 +00:00
TargetInstrInfo.cpp
ConstantTypeMustBeLoaded has been incorporated into SparcV9PreSelection, its
2004-07-27 21:43:38 +00:00
TargetMachine.cpp
Changes For Bug 352
2004-09-01 22:55:40 +00:00
TargetMachineRegistry.cpp
Implement TargetRegistrationListener
2004-07-11 06:03:21 +00:00
TargetSchedInfo.cpp
Since we use alloca now make sure we include the proper headers for it.
2004-09-28 02:53:15 +00:00