Nadav Rotem 3e40d927a7 ARM Cost Model: Modify the target independent cost model to ask ...

the target if it supports the different CAST types. We didn't do this
on X86 because of the different register sizes and types, but on ARM
this makes sense.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172245 91177308-0d34-0410-b5e6-96231b3b80d8

2013-01-11 19:54:13 +00:00

..

Analysis

Update CMakeLists for CallPrinter.cpp.

2013-01-11 17:34:05 +00:00

Archive

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

AsmParser

There was a switch fall-through in the parser for textual LLVM that caused

2013-01-07 13:32:38 +00:00

Bitcode

Revert s/Raw/getBitMask/g name change. This is possibly causing LTO test hangings.

2013-01-09 23:36:50 +00:00

CodeGen

ARM Cost Model: Modify the target independent cost model to ask

2013-01-11 19:54:13 +00:00

DebugInfo

[Object, DebugInfo] Make DWARFContext BE-aware.

2013-01-09 02:45:05 +00:00

ExecutionEngine

Fix bug in exception table allocation (PR13678)

2013-01-11 16:33:30 +00:00

IR

Support for half intrinsics. Pushes MMX into slower encoding path.

2013-01-11 01:45:05 +00:00

Linker

Fix a copy/paste error in the IR Linker, casting an ArrayType instead of a VectorType.

2013-01-10 10:49:36 +00:00

MC

Revert r172153, "llvm/lib/MC/MCParser/AsmParser.cpp: [ms-inline-asm] Fix a couple of undefined behaviors. Operand->needAddressOf() is not initialized at !Operand->isReg()."

2013-01-11 02:50:09 +00:00

Object

[Object][Archive] Fix name handling with bsd style long names.

2013-01-10 01:05:34 +00:00

Option

Resort the #include lines in include/... and lib/... with the

2013-01-02 10:22:59 +00:00

Support

SMDiagnostic: don't emit ranges if there are /any/ multibyte characters.

2013-01-11 02:37:55 +00:00

TableGen

TableGen: Keep track of superclass reference ranges.

2013-01-10 18:50:11 +00:00

Target

X86AsmParser.cpp: Fix up r172148, to add initializer in another CreateMem().

2013-01-11 01:13:54 +00:00

Transforms

ARM Cost Model: We need to detect the max bitwidth of types in the loop in order to select the max vectorization factor.

2013-01-11 07:11:59 +00:00

CMakeLists.txt

Rename VMCore directory to IR.

2013-01-02 09:10:48 +00:00

LLVMBuild.txt

Rename VMCore directory to IR.

2013-01-02 09:10:48 +00:00

Makefile

Rename VMCore directory to IR.

2013-01-02 09:10:48 +00:00