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https://github.com/c64scene-ar/llvm-6502.git
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3e61ccdded
This makes the two intrinsics @llvm.convert.from.f16 and @llvm.convert.to.f16 accept types other than simple "float". This is only strictly needed for the truncate operation, since otherwise double rounding occurs and there's no way to represent the strict IEEE conversion. However, for symmetry we allow larger types in the extend too. During legalization, we can expand an "fp16_to_double" operation into two extends for convenience, but abort when the truncate isn't legal. A new libcall is probably needed here. Even after this commit, various target tweaks are needed to actually use the extended intrinsics. I've put these into separate commits for clarity, so there are no actual tests of f64 conversion here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213248 91177308-0d34-0410-b5e6-96231b3b80d8
255 lines
7.3 KiB
LLVM
255 lines
7.3 KiB
LLVM
; RUN: llc < %s -mtriple=arm64-apple-ios -asm-verbose=false | FileCheck %s
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define float @load0(i16* nocapture readonly %a) nounwind {
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; CHECK-LABEL: load0:
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; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0]
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; CHECK-NEXT: fcvt s0, [[HREG]]
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; CHECK-NEXT: ret
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%tmp = load i16* %a, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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ret float %tmp1
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}
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define double @load1(i16* nocapture readonly %a) nounwind {
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; CHECK-LABEL: load1:
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; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0]
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; CHECK-NEXT: fcvt d0, [[HREG]]
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; CHECK-NEXT: ret
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%tmp = load i16* %a, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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%conv = fpext float %tmp1 to double
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ret double %conv
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}
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define float @load2(i16* nocapture readonly %a, i32 %i) nounwind {
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; CHECK-LABEL: load2:
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; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0, w1, sxtw #1]
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; CHECK-NEXT: fcvt s0, [[HREG]]
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; CHECK-NEXT: ret
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%idxprom = sext i32 %i to i64
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%arrayidx = getelementptr inbounds i16* %a, i64 %idxprom
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%tmp = load i16* %arrayidx, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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ret float %tmp1
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}
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define double @load3(i16* nocapture readonly %a, i32 %i) nounwind {
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; CHECK-LABEL: load3:
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; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0, w1, sxtw #1]
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; CHECK-NEXT: fcvt d0, [[HREG]]
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; CHECK-NEXT: ret
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%idxprom = sext i32 %i to i64
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%arrayidx = getelementptr inbounds i16* %a, i64 %idxprom
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%tmp = load i16* %arrayidx, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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%conv = fpext float %tmp1 to double
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ret double %conv
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}
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define float @load4(i16* nocapture readonly %a, i64 %i) nounwind {
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; CHECK-LABEL: load4:
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; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0, x1, lsl #1]
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; CHECK-NEXT: fcvt s0, [[HREG]]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i16* %a, i64 %i
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%tmp = load i16* %arrayidx, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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ret float %tmp1
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}
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define double @load5(i16* nocapture readonly %a, i64 %i) nounwind {
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; CHECK-LABEL: load5:
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; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0, x1, lsl #1]
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; CHECK-NEXT: fcvt d0, [[HREG]]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i16* %a, i64 %i
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%tmp = load i16* %arrayidx, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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%conv = fpext float %tmp1 to double
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ret double %conv
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}
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define float @load6(i16* nocapture readonly %a) nounwind {
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; CHECK-LABEL: load6:
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; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0, #20]
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; CHECK-NEXT: fcvt s0, [[HREG]]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i16* %a, i64 10
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%tmp = load i16* %arrayidx, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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ret float %tmp1
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}
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define double @load7(i16* nocapture readonly %a) nounwind {
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; CHECK-LABEL: load7:
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; CHECK-NEXT: ldr [[HREG:h[0-9]+]], [x0, #20]
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; CHECK-NEXT: fcvt d0, [[HREG]]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i16* %a, i64 10
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%tmp = load i16* %arrayidx, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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%conv = fpext float %tmp1 to double
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ret double %conv
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}
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define float @load8(i16* nocapture readonly %a) nounwind {
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; CHECK-LABEL: load8:
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; CHECK-NEXT: ldur [[HREG:h[0-9]+]], [x0, #-20]
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; CHECK-NEXT: fcvt s0, [[HREG]]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i16* %a, i64 -10
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%tmp = load i16* %arrayidx, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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ret float %tmp1
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}
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define double @load9(i16* nocapture readonly %a) nounwind {
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; CHECK-LABEL: load9:
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; CHECK-NEXT: ldur [[HREG:h[0-9]+]], [x0, #-20]
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; CHECK-NEXT: fcvt d0, [[HREG]]
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; CHECK-NEXT: ret
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%arrayidx = getelementptr inbounds i16* %a, i64 -10
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%tmp = load i16* %arrayidx, align 2
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%tmp1 = tail call float @llvm.convert.from.fp16.f32(i16 %tmp)
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%conv = fpext float %tmp1 to double
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ret double %conv
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}
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define void @store0(i16* nocapture %a, float %val) nounwind {
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; CHECK-LABEL: store0:
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; CHECK-NEXT: fcvt h0, s0
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; CHECK-NEXT: str h0, [x0]
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; CHECK-NEXT: ret
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %val)
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store i16 %tmp, i16* %a, align 2
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ret void
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}
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define void @store1(i16* nocapture %a, double %val) nounwind {
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; CHECK-LABEL: store1:
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; CHECK-NEXT: fcvt h0, d0
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; CHECK-NEXT: str h0, [x0]
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; CHECK-NEXT: ret
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%conv = fptrunc double %val to float
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %conv)
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store i16 %tmp, i16* %a, align 2
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ret void
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}
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define void @store2(i16* nocapture %a, i32 %i, float %val) nounwind {
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; CHECK-LABEL: store2:
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; CHECK-NEXT: fcvt h0, s0
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; CHECK-NEXT: str h0, [x0, w1, sxtw #1]
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; CHECK-NEXT: ret
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %val)
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%idxprom = sext i32 %i to i64
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%arrayidx = getelementptr inbounds i16* %a, i64 %idxprom
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store i16 %tmp, i16* %arrayidx, align 2
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ret void
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}
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define void @store3(i16* nocapture %a, i32 %i, double %val) nounwind {
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; CHECK-LABEL: store3:
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; CHECK-NEXT: fcvt h0, d0
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; CHECK-NEXT: str h0, [x0, w1, sxtw #1]
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; CHECK-NEXT: ret
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%conv = fptrunc double %val to float
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %conv)
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%idxprom = sext i32 %i to i64
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%arrayidx = getelementptr inbounds i16* %a, i64 %idxprom
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store i16 %tmp, i16* %arrayidx, align 2
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ret void
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}
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define void @store4(i16* nocapture %a, i64 %i, float %val) nounwind {
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; CHECK-LABEL: store4:
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; CHECK-NEXT: fcvt h0, s0
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; CHECK-NEXT: str h0, [x0, x1, lsl #1]
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; CHECK-NEXT: ret
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %val)
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%arrayidx = getelementptr inbounds i16* %a, i64 %i
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store i16 %tmp, i16* %arrayidx, align 2
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ret void
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}
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define void @store5(i16* nocapture %a, i64 %i, double %val) nounwind {
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; CHECK-LABEL: store5:
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; CHECK-NEXT: fcvt h0, d0
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; CHECK-NEXT: str h0, [x0, x1, lsl #1]
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; CHECK-NEXT: ret
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%conv = fptrunc double %val to float
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %conv)
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%arrayidx = getelementptr inbounds i16* %a, i64 %i
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store i16 %tmp, i16* %arrayidx, align 2
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ret void
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}
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define void @store6(i16* nocapture %a, float %val) nounwind {
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; CHECK-LABEL: store6:
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; CHECK-NEXT: fcvt h0, s0
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; CHECK-NEXT: str h0, [x0, #20]
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; CHECK-NEXT: ret
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %val)
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%arrayidx = getelementptr inbounds i16* %a, i64 10
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store i16 %tmp, i16* %arrayidx, align 2
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ret void
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}
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define void @store7(i16* nocapture %a, double %val) nounwind {
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; CHECK-LABEL: store7:
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; CHECK-NEXT: fcvt h0, d0
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; CHECK-NEXT: str h0, [x0, #20]
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; CHECK-NEXT: ret
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%conv = fptrunc double %val to float
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %conv)
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%arrayidx = getelementptr inbounds i16* %a, i64 10
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store i16 %tmp, i16* %arrayidx, align 2
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ret void
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}
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define void @store8(i16* nocapture %a, float %val) nounwind {
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; CHECK-LABEL: store8:
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; CHECK-NEXT: fcvt h0, s0
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; CHECK-NEXT: stur h0, [x0, #-20]
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; CHECK-NEXT: ret
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %val)
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%arrayidx = getelementptr inbounds i16* %a, i64 -10
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store i16 %tmp, i16* %arrayidx, align 2
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ret void
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}
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define void @store9(i16* nocapture %a, double %val) nounwind {
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; CHECK-LABEL: store9:
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; CHECK-NEXT: fcvt h0, d0
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; CHECK-NEXT: stur h0, [x0, #-20]
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; CHECK-NEXT: ret
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%conv = fptrunc double %val to float
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%tmp = tail call i16 @llvm.convert.to.fp16.f32(float %conv)
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%arrayidx = getelementptr inbounds i16* %a, i64 -10
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store i16 %tmp, i16* %arrayidx, align 2
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ret void
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}
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declare i16 @llvm.convert.to.fp16.f32(float) nounwind readnone
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declare float @llvm.convert.from.fp16.f32(i16) nounwind readnone
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