Tim Northover 3e61ccdded CodeGen: extend f16 conversions to permit types > float.
This makes the two intrinsics @llvm.convert.from.f16 and
@llvm.convert.to.f16 accept types other than simple "float". This is
only strictly needed for the truncate operation, since otherwise
double rounding occurs and there's no way to represent the strict IEEE
conversion. However, for symmetry we allow larger types in the extend
too.

During legalization, we can expand an "fp16_to_double" operation into
two extends for convenience, but abort when the truncate isn't legal. A new
libcall is probably needed here.

Even after this commit, various target tweaks are needed to actually use the
extended intrinsics. I've put these into separate commits for clarity, so there
are no actual tests of f64 conversion here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213248 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-17 10:51:23 +00:00

65 lines
2.3 KiB
LLVM

; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c | FileCheck %s -check-prefix=CHECK -check-prefix=LIBCALL
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=F16C
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -soft-float=1 -mattr=-f16c | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -soft-float=1 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT
; This is a test for float to half float conversions on x86-64.
;
; If flag -soft-float is set, or if there is no F16C support, then:
; 1) half float to float conversions are
; translated into calls to __gnu_h2f_ieee defined
; by the compiler runtime library;
; 2) float to half float conversions are translated into calls
; to __gnu_f2h_ieee which expected to be defined by the
; compiler runtime library.
;
; Otherwise (we have F16C support):
; 1) half float to float conversion are translated using
; vcvtph2ps instructions;
; 2) float to half float conversions are translated using
; vcvtps2ph instructions
define void @test1(float %src, i16* %dest) {
%1 = tail call i16 @llvm.convert.to.fp16.f32(float %src)
store i16 %1, i16* %dest, align 2
ret void
}
; CHECK-LABEL: test1
; LIBCALL: callq __gnu_f2h_ieee
; SOFTFLOAT: callq __gnu_f2h_ieee
; F16C: vcvtps2ph
; CHECK: ret
define float @test2(i16* nocapture %src) {
%1 = load i16* %src, align 2
%2 = tail call float @llvm.convert.from.fp16.f32(i16 %1)
ret float %2
}
; CHECK-LABEL: test2:
; LIBCALL: jmp __gnu_h2f_ieee
; SOFTFLOAT: callq __gnu_h2f_ieee
; F16C: vcvtph2ps
; F16C: ret
define float @test3(float %src) nounwind uwtable readnone {
%1 = tail call i16 @llvm.convert.to.fp16.f32(float %src)
%2 = tail call float @llvm.convert.from.fp16.f32(i16 %1)
ret float %2
}
; CHECK-LABEL: test3:
; LIBCALL: callq __gnu_f2h_ieee
; LIBCALL: jmp __gnu_h2f_ieee
; SOFTFLOAT: callq __gnu_f2h_ieee
; SOFTFLOAT: callq __gnu_h2f_ieee
; F16C: vcvtps2ph
; F16C-NEXT: vcvtph2ps
; F16C: ret
declare float @llvm.convert.from.fp16.f32(i16) nounwind readnone
declare i16 @llvm.convert.to.fp16.f32(float) nounwind readnone