Akira Hatanaka 3e6758541b [mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double ... precision loads and stores as well as reg+imm double precision loads and stores. Previously, expansion of loads and stores was done after register allocation, but now it takes place during legalization. As a result, users will see double precision stores and loads being emitted to spill and restore 64-bit FP registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190235 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-07 00:52:30 +00:00
..
AArch64
ARM	Debug Info Testing: updated to use NULL instead of "i32 0" in a few fields.	2013-09-06 21:03:58 +00:00
CPP
Generic
Hexagon	Debug Info Testing: updated to use NULL instead of "i32 0" in a few fields.	2013-09-06 21:03:58 +00:00
Inputs
Mips	[mips] Enhance command line option "-mno-ldc1-sdc1" to expand base+index double	2013-09-07 00:52:30 +00:00
MSP430
NVPTX
PowerPC	Debug Info Testing: updated to use NULL instead of "i32 0" in a few fields.	2013-09-06 21:03:58 +00:00
R600	R600: Add support for LDS atomic subtract	2013-09-06 20:17:42 +00:00
SPARC	[Sparc] Correctly handle call to functions with ReturnsTwice attribute.	2013-09-05 05:32:16 +00:00
SystemZ	[SystemZ] Tweak integer comparison code	2013-09-06 11:51:39 +00:00
Thumb
Thumb2
X86	Debug Info Testing: updated to use NULL instead of "i32 0" in a few fields.	2013-09-06 21:03:58 +00:00
XCore