Files
llvm-6502/lib/Target/PowerPC
Nate Begeman 3e89716ad7 fsel generation for f32 and f64 select
generate compare immediate for integer compare with constant
fold setcc into branch
fold setcc into select

Code generation quality for Shootout is now on par with the Simple ISel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20968 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31 23:55:40 +00:00
..
2004-11-21 00:00:54 +00:00
2004-12-16 17:26:44 +00:00
2004-12-16 16:31:57 +00:00
2004-12-16 16:31:57 +00:00
2004-11-23 05:57:57 +00:00
2004-12-16 16:31:57 +00:00
2004-11-23 18:47:55 +00:00

TODO:
* poor switch statement codegen
* load/store to alloca'd array or struct.
* implement not-R0 register GPR class
* implement scheduling info
* implement do-loop pass
* implement do-loop -> bdnz transform
* implement powerpc-64 for darwin
* implement powerpc-64 for aix
* use stfiwx in float->int
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests that should pass:
* MultiSource
  |- Applications
  |  `- hbd: miscompilation