Jiangning Liu 082ac99cc8 Implement AArch64 NEON instruction set AdvSIMD (table). ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194648 91177308-0d34-0410-b5e6-96231b3b80d8

2013-11-14 01:57:32 +00:00

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AArch64

Implement AArch64 NEON instruction set AdvSIMD (table).

2013-11-14 01:57:32 +00:00

ARM

Enable generating legacy IT block for AArch32

2013-11-13 18:29:49 +00:00

CPP

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Generic

Change objectsize intrinsic to accept different address spaces.

2013-10-07 18:06:48 +00:00

Hexagon

TBAA: remove !tbaa from testing cases when they are not needed.

2013-09-30 18:17:35 +00:00

Inputs

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Mips

Take care of long short branch immediate instructions for mips16 in

2013-11-13 23:52:18 +00:00

MSP430

Make sure SP is always aligned on a 2 byte boundary

2013-10-24 09:32:31 +00:00

NVPTX

[NVPTX] Properly handle bitcast ConstantExpr when checking for the alignment of function parameters

2013-11-11 19:28:19 +00:00

PowerPC

Add PPC option for full register names in asm

2013-11-11 14:58:40 +00:00

R600

R600/SI: Add support for private address space load/store

2013-11-13 23:36:50 +00:00

SPARC

[SparcV9] Handle i64 <-> float conversions in sparcv9 mode.

2013-11-03 12:28:40 +00:00

SystemZ

[SystemZ] Automatically detect zEC12 and z196 hosts

2013-10-31 12:14:17 +00:00

Thumb

17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets

2013-10-17 19:52:05 +00:00

Thumb2

Enable generating legacy IT block for AArch32

2013-11-13 18:29:49 +00:00

X86

Remove AllowQuotesInName and friends from MCAsmInfo.

2013-11-13 14:01:59 +00:00

XCore

XCore target: implement exception handling

2013-11-13 10:19:31 +00:00