mirror of
https://github.com/c64scene-ar/llvm-6502.git
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b6c215b63f
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84932 91177308-0d34-0410-b5e6-96231b3b80d8
79 lines
2.2 KiB
LLVM
79 lines
2.2 KiB
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s
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; test vector shifts converted to proper SSE2 vector shifts when the shift
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; amounts are the same.
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define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind {
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entry:
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; CHECK: shift1a:
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; CHECK: psrlq
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%lshr = lshr <2 x i64> %val, < i64 32, i64 32 >
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store <2 x i64> %lshr, <2 x i64>* %dst
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ret void
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}
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define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind {
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entry:
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; CHECK: shift1b:
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; CHECK: movd
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; CHECK-NEXT: psrlq
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%0 = insertelement <2 x i64> undef, i64 %amt, i32 0
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%1 = insertelement <2 x i64> %0, i64 %amt, i32 1
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%lshr = lshr <2 x i64> %val, %1
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store <2 x i64> %lshr, <2 x i64>* %dst
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ret void
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}
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define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind {
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entry:
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; CHECK: shift2a:
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; CHECK: psrld
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%lshr = lshr <4 x i32> %val, < i32 17, i32 17, i32 17, i32 17 >
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store <4 x i32> %lshr, <4 x i32>* %dst
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ret void
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}
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define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
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entry:
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; CHECK: shift2b:
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; CHECK: movd
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; CHECK-NEXT: psrld
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%0 = insertelement <4 x i32> undef, i32 %amt, i32 0
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%1 = insertelement <4 x i32> %0, i32 %amt, i32 1
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%2 = insertelement <4 x i32> %1, i32 %amt, i32 2
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%3 = insertelement <4 x i32> %2, i32 %amt, i32 3
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%lshr = lshr <4 x i32> %val, %3
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store <4 x i32> %lshr, <4 x i32>* %dst
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ret void
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}
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define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind {
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entry:
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; CHECK: shift3a:
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; CHECK: psrlw
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%lshr = lshr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 >
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store <8 x i16> %lshr, <8 x i16>* %dst
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ret void
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}
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; properly zero extend the shift amount
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define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind {
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entry:
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; CHECK: shift3b:
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; CHECK: movzwl
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; CHECK: movd
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; CHECK-NEXT: psrlw
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%0 = insertelement <8 x i16> undef, i16 %amt, i32 0
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%1 = insertelement <8 x i16> %0, i16 %amt, i32 1
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%2 = insertelement <8 x i16> %0, i16 %amt, i32 2
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%3 = insertelement <8 x i16> %0, i16 %amt, i32 3
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%4 = insertelement <8 x i16> %0, i16 %amt, i32 4
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%5 = insertelement <8 x i16> %0, i16 %amt, i32 5
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%6 = insertelement <8 x i16> %0, i16 %amt, i32 6
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%7 = insertelement <8 x i16> %0, i16 %amt, i32 7
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%lshr = lshr <8 x i16> %val, %7
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store <8 x i16> %lshr, <8 x i16>* %dst
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ret void
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}
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