mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-11-04 05:17:07 +00:00
c21a821e9f
E.g. -5 % 5 is 0 with srem and 1 with urem. Also addresses Frits van Bommel's comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120049 91177308-0d34-0410-b5e6-96231b3b80d8
455 lines
11 KiB
LLVM
455 lines
11 KiB
LLVM
; This test makes sure that these instructions are properly eliminated.
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;
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i32 @test1(i32 %A) {
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; CHECK: @test1
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; CHECK: ret i32 %A
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%B = shl i32 %A, 0 ; <i32> [#uses=1]
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ret i32 %B
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}
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define i32 @test2(i8 %A) {
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; CHECK: @test2
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; CHECK: ret i32 0
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%shift.upgrd.1 = zext i8 %A to i32 ; <i32> [#uses=1]
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%B = shl i32 0, %shift.upgrd.1 ; <i32> [#uses=1]
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ret i32 %B
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}
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define i32 @test3(i32 %A) {
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; CHECK: @test3
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; CHECK: ret i32 %A
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%B = ashr i32 %A, 0 ; <i32> [#uses=1]
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ret i32 %B
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}
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define i32 @test4(i8 %A) {
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; CHECK: @test4
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; CHECK: ret i32 0
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%shift.upgrd.2 = zext i8 %A to i32 ; <i32> [#uses=1]
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%B = ashr i32 0, %shift.upgrd.2 ; <i32> [#uses=1]
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ret i32 %B
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}
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define i32 @test5(i32 %A) {
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; CHECK: @test5
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; CHECK: ret i32 0
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%B = lshr i32 %A, 32 ;; shift all bits out
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ret i32 %B
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}
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define i32 @test5a(i32 %A) {
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; CHECK: @test5a
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; CHECK: ret i32 0
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%B = shl i32 %A, 32 ;; shift all bits out
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ret i32 %B
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}
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define i32 @test6(i32 %A) {
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; CHECK: @test6
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; CHECK-NEXT: mul i32 %A, 6
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; CHECK-NEXT: ret i32
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%B = shl i32 %A, 1 ;; convert to an mul instruction
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%C = mul i32 %B, 3
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ret i32 %C
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}
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define i32 @test7(i8 %A) {
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; CHECK: @test7
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; CHECK-NEXT: ret i32 -1
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%shift.upgrd.3 = zext i8 %A to i32
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%B = ashr i32 -1, %shift.upgrd.3 ;; Always equal to -1
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ret i32 %B
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}
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;; (A << 5) << 3 === A << 8 == 0
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define i8 @test8(i8 %A) {
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; CHECK: @test8
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; CHECK: ret i8 0
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%B = shl i8 %A, 5 ; <i8> [#uses=1]
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%C = shl i8 %B, 3 ; <i8> [#uses=1]
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ret i8 %C
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}
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;; (A << 7) >> 7 === A & 1
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define i8 @test9(i8 %A) {
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; CHECK: @test9
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; CHECK-NEXT: and i8 %A, 1
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; CHECK-NEXT: ret i8
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%B = shl i8 %A, 7 ; <i8> [#uses=1]
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%C = lshr i8 %B, 7 ; <i8> [#uses=1]
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ret i8 %C
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}
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;; (A >> 7) << 7 === A & 128
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define i8 @test10(i8 %A) {
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; CHECK: @test10
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; CHECK-NEXT: and i8 %A, -128
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; CHECK-NEXT: ret i8
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%B = lshr i8 %A, 7 ; <i8> [#uses=1]
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%C = shl i8 %B, 7 ; <i8> [#uses=1]
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ret i8 %C
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}
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;; (A >> 3) << 4 === (A & 0x1F) << 1
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define i8 @test11(i8 %A) {
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; CHECK: @test11
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; CHECK-NEXT: mul i8 %A, 6
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; CHECK-NEXT: and i8
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; CHECK-NEXT: ret i8
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%a = mul i8 %A, 3 ; <i8> [#uses=1]
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%B = lshr i8 %a, 3 ; <i8> [#uses=1]
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%C = shl i8 %B, 4 ; <i8> [#uses=1]
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ret i8 %C
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}
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;; (A >> 8) << 8 === A & -256
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define i32 @test12(i32 %A) {
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; CHECK: @test12
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; CHECK-NEXT: and i32 %A, -256
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; CHECK-NEXT: ret i32
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%B = ashr i32 %A, 8 ; <i32> [#uses=1]
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%C = shl i32 %B, 8 ; <i32> [#uses=1]
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ret i32 %C
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}
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;; (A >> 3) << 4 === (A & -8) * 2
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define i8 @test13(i8 %A) {
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; CHECK: @test13
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; CHECK-NEXT: mul i8 %A, 6
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; CHECK-NEXT: and i8
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; CHECK-NEXT: ret i8
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%a = mul i8 %A, 3 ; <i8> [#uses=1]
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%B = ashr i8 %a, 3 ; <i8> [#uses=1]
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%C = shl i8 %B, 4 ; <i8> [#uses=1]
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ret i8 %C
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}
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;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
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define i32 @test14(i32 %A) {
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; CHECK: @test14
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; CHECK-NEXT: %B = and i32 %A, -19760
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; CHECK-NEXT: or i32 %B, 19744
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; CHECK-NEXT: ret i32
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%B = lshr i32 %A, 4 ; <i32> [#uses=1]
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%C = or i32 %B, 1234 ; <i32> [#uses=1]
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%D = shl i32 %C, 4 ; <i32> [#uses=1]
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ret i32 %D
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}
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;; D = ((B | 1234) << 4) === ((B << 4)|(1234 << 4)
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define i32 @test14a(i32 %A) {
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; CHECK: @test14a
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; CHECK-NEXT: and i32 %A, 77
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; CHECK-NEXT: ret i32
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%B = shl i32 %A, 4 ; <i32> [#uses=1]
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%C = and i32 %B, 1234 ; <i32> [#uses=1]
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%D = lshr i32 %C, 4 ; <i32> [#uses=1]
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ret i32 %D
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}
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define i32 @test15(i1 %C) {
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; CHECK: @test15
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; CHECK-NEXT: select i1 %C, i32 12, i32 4
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; CHECK-NEXT: ret i32
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%A = select i1 %C, i32 3, i32 1 ; <i32> [#uses=1]
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%V = shl i32 %A, 2 ; <i32> [#uses=1]
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ret i32 %V
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}
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define i32 @test15a(i1 %C) {
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; CHECK: @test15a
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; CHECK-NEXT: select i1 %C, i32 512, i32 128
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; CHECK-NEXT: ret i32
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%A = select i1 %C, i8 3, i8 1 ; <i8> [#uses=1]
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%shift.upgrd.4 = zext i8 %A to i32 ; <i32> [#uses=1]
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%V = shl i32 64, %shift.upgrd.4 ; <i32> [#uses=1]
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ret i32 %V
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}
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define i1 @test16(i32 %X) {
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; CHECK: @test16
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; CHECK-NEXT: and i32 %X, 16
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; CHECK-NEXT: icmp ne i32
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; CHECK-NEXT: ret i1
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%tmp.3 = ashr i32 %X, 4
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%tmp.6 = and i32 %tmp.3, 1
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%tmp.7 = icmp ne i32 %tmp.6, 0
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ret i1 %tmp.7
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}
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define i1 @test17(i32 %A) {
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; CHECK: @test17
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; CHECK-NEXT: and i32 %A, -8
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; CHECK-NEXT: icmp eq i32
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; CHECK-NEXT: ret i1
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%B = lshr i32 %A, 3 ; <i32> [#uses=1]
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%C = icmp eq i32 %B, 1234 ; <i1> [#uses=1]
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ret i1 %C
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}
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define i1 @test18(i8 %A) {
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; CHECK: @test18
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; CHECK: ret i1 false
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%B = lshr i8 %A, 7 ; <i8> [#uses=1]
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;; false
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%C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
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ret i1 %C
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}
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define i1 @test19(i32 %A) {
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; CHECK: @test19
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; CHECK-NEXT: icmp ult i32 %A, 4
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; CHECK-NEXT: ret i1
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%B = ashr i32 %A, 2 ; <i32> [#uses=1]
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;; (X & -4) == 0
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%C = icmp eq i32 %B, 0 ; <i1> [#uses=1]
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ret i1 %C
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}
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define i1 @test19a(i32 %A) {
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; CHECK: @test19a
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; CHECK-NEXT: and i32 %A, -4
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; CHECK-NEXT: icmp eq i32
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; CHECK-NEXT: ret i1
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%B = ashr i32 %A, 2 ; <i32> [#uses=1]
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;; (X & -4) == -4
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%C = icmp eq i32 %B, -1 ; <i1> [#uses=1]
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ret i1 %C
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}
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define i1 @test20(i8 %A) {
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; CHECK: @test20
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; CHECK: ret i1 false
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%B = ashr i8 %A, 7 ; <i8> [#uses=1]
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;; false
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%C = icmp eq i8 %B, 123 ; <i1> [#uses=1]
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ret i1 %C
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}
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define i1 @test21(i8 %A) {
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; CHECK: @test21
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; CHECK-NEXT: and i8 %A, 15
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; CHECK-NEXT: icmp eq i8
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; CHECK-NEXT: ret i1
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%B = shl i8 %A, 4 ; <i8> [#uses=1]
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%C = icmp eq i8 %B, -128 ; <i1> [#uses=1]
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ret i1 %C
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}
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define i1 @test22(i8 %A) {
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; CHECK: @test22
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; CHECK-NEXT: and i8 %A, 15
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; CHECK-NEXT: icmp eq i8
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; CHECK-NEXT: ret i1
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%B = shl i8 %A, 4 ; <i8> [#uses=1]
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%C = icmp eq i8 %B, 0 ; <i1> [#uses=1]
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ret i1 %C
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}
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define i8 @test23(i32 %A) {
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; CHECK: @test23
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; CHECK-NEXT: trunc i32 %A to i8
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; CHECK-NEXT: ret i8
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;; casts not needed
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%B = shl i32 %A, 24 ; <i32> [#uses=1]
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%C = ashr i32 %B, 24 ; <i32> [#uses=1]
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%D = trunc i32 %C to i8 ; <i8> [#uses=1]
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ret i8 %D
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}
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define i8 @test24(i8 %X) {
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; CHECK: @test24
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; CHECK-NEXT: and i8 %X, 3
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; CHECK-NEXT: ret i8
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%Y = and i8 %X, -5 ; <i8> [#uses=1]
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%Z = shl i8 %Y, 5 ; <i8> [#uses=1]
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%Q = ashr i8 %Z, 5 ; <i8> [#uses=1]
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ret i8 %Q
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}
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define i32 @test25(i32 %tmp.2, i32 %AA) {
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; CHECK: @test25
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; CHECK-NEXT: and i32 %tmp.2, -131072
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; CHECK-NEXT: add i32 %{{[^,]*}}, %AA
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; CHECK-NEXT: and i32 %{{[^,]*}}, -131072
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; CHECK-NEXT: ret i32
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%x = lshr i32 %AA, 17 ; <i32> [#uses=1]
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%tmp.3 = lshr i32 %tmp.2, 17 ; <i32> [#uses=1]
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%tmp.5 = add i32 %tmp.3, %x ; <i32> [#uses=1]
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%tmp.6 = shl i32 %tmp.5, 17 ; <i32> [#uses=1]
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ret i32 %tmp.6
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}
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;; handle casts between shifts.
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define i32 @test26(i32 %A) {
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; CHECK: @test26
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; CHECK-NEXT: and i32 %A, -2
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; CHECK-NEXT: ret i32
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%B = lshr i32 %A, 1 ; <i32> [#uses=1]
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%C = bitcast i32 %B to i32 ; <i32> [#uses=1]
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%D = shl i32 %C, 1 ; <i32> [#uses=1]
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ret i32 %D
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}
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define i1 @test27(i32 %x) nounwind {
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; CHECK: @test27
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; CHECK-NEXT: and i32 %x, 8
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; CHECK-NEXT: icmp ne i32
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; CHECK-NEXT: ret i1
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%y = lshr i32 %x, 3
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%z = trunc i32 %y to i1
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ret i1 %z
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}
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define i8 @test28(i8 %x) {
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entry:
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; CHECK: @test28
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; CHECK: icmp slt i8 %x, 0
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; CHECK-NEXT: br i1
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%tmp1 = lshr i8 %x, 7
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%cond1 = icmp ne i8 %tmp1, 0
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br i1 %cond1, label %bb1, label %bb2
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bb1:
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ret i8 0
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bb2:
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ret i8 1
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}
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define i8 @test28a(i8 %x, i8 %y) {
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entry:
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; This shouldn't be transformed.
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; CHECK: @test28a
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; CHECK: %tmp1 = lshr i8 %x, 7
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; CHECK: %cond1 = icmp eq i8 %tmp1, 0
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; CHECK: br i1 %cond1, label %bb2, label %bb1
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%tmp1 = lshr i8 %x, 7
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%cond1 = icmp ne i8 %tmp1, 0
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br i1 %cond1, label %bb1, label %bb2
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bb1:
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ret i8 %tmp1
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bb2:
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%tmp2 = add i8 %tmp1, %y
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ret i8 %tmp2
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}
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define i32 @test29(i64 %d18) {
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entry:
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%tmp916 = lshr i64 %d18, 32
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%tmp917 = trunc i64 %tmp916 to i32
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%tmp10 = lshr i32 %tmp917, 31
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ret i32 %tmp10
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; CHECK: @test29
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; CHECK: %tmp916 = lshr i64 %d18, 63
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; CHECK: %tmp10 = trunc i64 %tmp916 to i32
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}
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define i32 @test30(i32 %A, i32 %B, i32 %C) {
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%X = shl i32 %A, %C
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%Y = shl i32 %B, %C
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%Z = and i32 %X, %Y
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ret i32 %Z
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; CHECK: @test30
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; CHECK: %X1 = and i32 %A, %B
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; CHECK: %Z = shl i32 %X1, %C
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}
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define i32 @test31(i32 %A, i32 %B, i32 %C) {
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%X = lshr i32 %A, %C
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%Y = lshr i32 %B, %C
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%Z = or i32 %X, %Y
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ret i32 %Z
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; CHECK: @test31
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; CHECK: %X1 = or i32 %A, %B
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; CHECK: %Z = lshr i32 %X1, %C
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}
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define i32 @test32(i32 %A, i32 %B, i32 %C) {
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%X = ashr i32 %A, %C
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%Y = ashr i32 %B, %C
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%Z = xor i32 %X, %Y
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ret i32 %Z
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; CHECK: @test32
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; CHECK: %X1 = xor i32 %A, %B
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; CHECK: %Z = ashr i32 %X1, %C
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; CHECK: ret i32 %Z
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}
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define i1 @test33(i32 %X) {
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%tmp1 = shl i32 %X, 7
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%tmp2 = icmp slt i32 %tmp1, 0
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ret i1 %tmp2
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; CHECK: @test33
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; CHECK: %tmp1.mask = and i32 %X, 16777216
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; CHECK: %tmp2 = icmp ne i32 %tmp1.mask, 0
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}
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define i1 @test34(i32 %X) {
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%tmp1 = lshr i32 %X, 7
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%tmp2 = icmp slt i32 %tmp1, 0
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ret i1 %tmp2
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; CHECK: @test34
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; CHECK: ret i1 false
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}
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define i1 @test35(i32 %X) {
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%tmp1 = ashr i32 %X, 7
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%tmp2 = icmp slt i32 %tmp1, 0
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ret i1 %tmp2
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; CHECK: @test35
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; CHECK: %tmp2 = icmp slt i32 %X, 0
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; CHECK: ret i1 %tmp2
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}
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define i128 @test36(i128 %A, i128 %B) {
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entry:
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%tmp27 = shl i128 %A, 64
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%tmp23 = shl i128 %B, 64
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%ins = or i128 %tmp23, %tmp27
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%tmp45 = lshr i128 %ins, 64
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ret i128 %tmp45
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; CHECK: @test36
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; CHECK: %tmp231 = or i128 %B, %A
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; CHECK: %ins = and i128 %tmp231, 18446744073709551615
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; CHECK: ret i128 %ins
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}
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define i64 @test37(i128 %A, i32 %B) {
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entry:
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%tmp27 = shl i128 %A, 64
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%tmp22 = zext i32 %B to i128
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%tmp23 = shl i128 %tmp22, 96
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%ins = or i128 %tmp23, %tmp27
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%tmp45 = lshr i128 %ins, 64
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%tmp46 = trunc i128 %tmp45 to i64
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ret i64 %tmp46
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; CHECK: @test37
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; CHECK: %tmp23 = shl i128 %tmp22, 32
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; CHECK: %ins = or i128 %tmp23, %A
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; CHECK: %tmp46 = trunc i128 %ins to i64
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}
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define i32 @test38(i32 %x) nounwind readnone {
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%rem = srem i32 %x, 32
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%shl = shl i32 1, %rem
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ret i32 %shl
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; CHECK: @test38
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; CHECK-NEXT: and i32 %x, 31
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; CHECK-NEXT: shl i32 1
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; CHECK-NEXT: ret i32
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}
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