llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-28 06:32:09 +00:00

History

Kevin Qin 3f8f3c9feb Fix a bug in DAGcombiner about zero-extend after setcc.

For AArch64 backend, if DAGCombiner see "sext(setcc)", it will
combine them together to a single setcc with extended value type.
Then if it see "zext(setcc)", it assumes setcc is Vxi1, and try to
create "(and (vsetcc), (1, 1, ...)". While setcc isn't Vxi1,
DAGcombiner will create wrong node and get wrong code emitted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198190 91177308-0d34-0410-b5e6-96231b3b80d8

2013-12-30 02:05:13 +00:00

Analysis

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Assembler

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Bindings

Update the ML test to expect the new string format of getStringRepresentation.

2013-12-19 23:38:09 +00:00

Bitcode

Ensure bitcode encoding of calling conventions stays stable. Patch by Boaz Ouriel.

2013-12-22 07:51:53 +00:00

BugPoint